cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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uniphier-ld20-ref.dts (1326B)

      1// SPDX-License-Identifier: GPL-2.0+ OR MIT
      2//
      3// Device Tree Source for UniPhier LD20 Reference Board
      4//
      5// Copyright (C) 2015-2016 Socionext Inc.
      6//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
      7
      8/dts-v1/;
      9#include "uniphier-ld20.dtsi"
     10#include "uniphier-ref-daughter.dtsi"
     11#include "uniphier-support-card.dtsi"
     12
     13/ {
     14	model = "UniPhier LD20 Reference Board";
     15	compatible = "socionext,uniphier-ld20-ref", "socionext,uniphier-ld20";
     16
     17	chosen {
     18		stdout-path = "serial0:115200n8";
     19	};
     20
     21	aliases {
     22		serial0 = &serial0;
     23		serial1 = &serialsc;
     24		serial2 = &serial2;
     25		serial3 = &serial3;
     26		i2c0 = &i2c0;
     27		i2c1 = &i2c1;
     28		i2c2 = &i2c2;
     29		i2c3 = &i2c3;
     30		i2c4 = &i2c4;
     31		i2c5 = &i2c5;
     32		ethernet0 = &eth;
     33	};
     34
     35	memory@80000000 {
     36		device_type = "memory";
     37		reg = <0 0x80000000 0 0xc0000000>;
     38	};
     39};
     40
     41&ethsc {
     42	interrupts = <0 8>;
     43};
     44
     45&serialsc {
     46	interrupts = <0 8>;
     47};
     48
     49&serial0 {
     50	status = "okay";
     51};
     52
     53&gpio {
     54	xirq0 {
     55		gpio-hog;
     56		gpios = <UNIPHIER_GPIO_IRQ(0) 0>;
     57		input;
     58	};
     59};
     60
     61&i2c0 {
     62	status = "okay";
     63};
     64
     65&eth {
     66	status = "okay";
     67	phy-handle = <&ethphy>;
     68};
     69
     70&mdio {
     71	ethphy: ethernet-phy@0 {
     72		reg = <0>;
     73	};
     74};
     75
     76&pinctrl_ether_rgmii {
     77	tx {
     78		pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1",
     79		       "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL";
     80		drive-strength = <9>;
     81	};
     82};
     83
     84&usb {
     85	status = "okay";
     86};