cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

fsd-pinctrl.dtsi (6605B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Tesla Full Self-Driving SoC device tree source
      4 *
      5 * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd.
      6 *		https://www.samsung.com
      7 * Copyright (c) 2017-2021 Tesla, Inc.
      8 *		https://www.tesla.com
      9 */
     10
     11#include <dt-bindings/pinctrl/samsung.h>
     12
     13&pinctrl_fsys0 {
     14	gpf0: gpf0-gpio-bank {
     15		gpio-controller;
     16		#gpio-cells = <2>;
     17
     18		interrupt-controller;
     19		#interrupt-cells = <2>;
     20	};
     21
     22	gpf1: gpf1-gpio-bank {
     23		gpio-controller;
     24		#gpio-cells = <2>;
     25
     26		interrupt-controller;
     27		#interrupt-cells = <2>;
     28	};
     29
     30	gpf6: gpf6-gpio-bank {
     31		gpio-controller;
     32		#gpio-cells = <2>;
     33
     34		interrupt-controller;
     35		#interrupt-cells = <2>;
     36	};
     37
     38	gpf4: gpf4-gpio-bank {
     39		gpio-controller;
     40		#gpio-cells = <2>;
     41
     42		interrupt-controller;
     43		#interrupt-cells = <2>;
     44	};
     45
     46	gpf5: gpf5-gpio-bank {
     47		gpio-controller;
     48		#gpio-cells = <2>;
     49
     50		interrupt-controller;
     51		#interrupt-cells = <2>;
     52	};
     53};
     54
     55&pinctrl_peric {
     56	gpc8: gpc8-gpio-bank {
     57		gpio-controller;
     58		#gpio-cells = <2>;
     59
     60		interrupt-controller;
     61		#interrupt-cells = <2>;
     62	};
     63
     64	gpf2: gpf2-gpio-bank {
     65		gpio-controller;
     66		#gpio-cells = <2>;
     67
     68		interrupt-controller;
     69		#interrupt-cells = <2>;
     70	};
     71
     72	gpf3: gpf3-gpio-bank {
     73		gpio-controller;
     74		#gpio-cells = <2>;
     75
     76		interrupt-controller;
     77		#interrupt-cells = <2>;
     78	};
     79
     80	gpd0: gpd0-gpio-bank {
     81		gpio-controller;
     82		#gpio-cells = <2>;
     83
     84		interrupt-controller;
     85		#interrupt-cells = <2>;
     86	};
     87
     88	gpb0: gpb0-gpio-bank {
     89		gpio-controller;
     90		#gpio-cells = <2>;
     91
     92		interrupt-controller;
     93		#interrupt-cells = <2>;
     94	};
     95
     96	gpb1: gpb1-gpio-bank {
     97		gpio-controller;
     98		#gpio-cells = <2>;
     99
    100		interrupt-controller;
    101		#interrupt-cells = <2>;
    102	};
    103
    104	gpb4: gpb4-gpio-bank {
    105		gpio-controller;
    106		#gpio-cells = <2>;
    107
    108		interrupt-controller;
    109		#interrupt-cells = <2>;
    110	};
    111
    112	gpb5: gpb5-gpio-bank {
    113		gpio-controller;
    114		#gpio-cells = <2>;
    115
    116		interrupt-controller;
    117		#interrupt-cells = <2>;
    118	};
    119
    120	gpb6: gpb6-gpio-bank {
    121		gpio-controller;
    122		#gpio-cells = <2>;
    123
    124		interrupt-controller;
    125		#interrupt-cells = <2>;
    126	};
    127
    128	gpb7: gpb7-gpio-bank {
    129		gpio-controller;
    130		#gpio-cells = <2>;
    131
    132		interrupt-controller;
    133		#interrupt-cells = <2>;
    134	};
    135
    136	gpd1: gpd1-gpio-bank {
    137		gpio-controller;
    138		#gpio-cells = <2>;
    139
    140		interrupt-controller;
    141		#interrupt-cells = <2>;
    142	};
    143
    144	gpd2: gpd2-gpio-bank {
    145		gpio-controller;
    146		#gpio-cells = <2>;
    147
    148		interrupt-controller;
    149		#interrupt-cells = <2>;
    150	};
    151
    152	gpd3: gpd3-gpio-bank {
    153		gpio-controller;
    154		#gpio-cells = <2>;
    155
    156		interrupt-controller;
    157		#interrupt-cells = <2>;
    158	};
    159
    160	gpg0: gpg0-gpio-bank {
    161		gpio-controller;
    162		#gpio-cells = <2>;
    163
    164		interrupt-controller;
    165		#interrupt-cells = <2>;
    166	};
    167
    168	gpg1: gpg1-gpio-bank {
    169		gpio-controller;
    170		#gpio-cells = <2>;
    171
    172		interrupt-controller;
    173		#interrupt-cells = <2>;
    174	};
    175
    176	gpg2: gpg2-gpio-bank {
    177		gpio-controller;
    178		#gpio-cells = <2>;
    179
    180		interrupt-controller;
    181		#interrupt-cells = <2>;
    182	};
    183
    184	gpg3: gpg3-gpio-bank {
    185		gpio-controller;
    186		#gpio-cells = <2>;
    187
    188		interrupt-controller;
    189		#interrupt-cells = <2>;
    190	};
    191
    192	gpg4: gpg4-gpio-bank {
    193		gpio-controller;
    194		#gpio-cells = <2>;
    195
    196		interrupt-controller;
    197		#interrupt-cells = <2>;
    198	};
    199
    200	gpg5: gpg5-gpio-bank {
    201		gpio-controller;
    202		#gpio-cells = <2>;
    203
    204		interrupt-controller;
    205		#interrupt-cells = <2>;
    206	};
    207
    208	gpg6: gpg6-gpio-bank {
    209		gpio-controller;
    210		#gpio-cells = <2>;
    211
    212		interrupt-controller;
    213		#interrupt-cells = <2>;
    214	};
    215
    216	gpg7: gpg7-gpio-bank {
    217		gpio-controller;
    218		#gpio-cells = <2>;
    219
    220		interrupt-controller;
    221		#interrupt-cells = <2>;
    222	};
    223
    224	pwm0_out: pwm0-out-pins {
    225		samsung,pins = "gpb6-1";
    226		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    227		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    228		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>;
    229	};
    230
    231	pwm1_out: pwm1-out-pins {
    232		samsung,pins = "gpb6-5";
    233		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    234		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    235		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>;
    236	};
    237
    238	hs_i2c0_bus: hs-i2c0-bus-pins {
    239		samsung,pins = "gpb0-0", "gpb0-1";
    240		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    241		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    242		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    243	};
    244
    245	hs_i2c1_bus: hs-i2c1-bus-pins {
    246		samsung,pins = "gpb0-2", "gpb0-3";
    247		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    248		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    249		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    250	};
    251
    252	hs_i2c2_bus: hs-i2c2-bus-pins {
    253		samsung,pins = "gpb0-4", "gpb0-5";
    254		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    255		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    256		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    257	};
    258
    259	hs_i2c3_bus: hs-i2c3-bus-pins {
    260		samsung,pins = "gpb0-6", "gpb0-7";
    261		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    262		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    263		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    264	};
    265
    266	hs_i2c4_bus: hs-i2c4-bus-pins {
    267		samsung,pins = "gpb1-0", "gpb1-1";
    268		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    269		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    270		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    271	};
    272
    273	hs_i2c5_bus: hs-i2c5-bus-pins {
    274		samsung,pins = "gpb1-2", "gpb1-3";
    275		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    276		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    277		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    278	};
    279
    280	hs_i2c6_bus: hs-i2c6-bus-pins {
    281		samsung,pins = "gpb1-4", "gpb1-5";
    282		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    283		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    284		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    285	};
    286
    287	hs_i2c7_bus: hs-i2c7-bus-pins {
    288		samsung,pins = "gpb1-6", "gpb1-7";
    289		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    290		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    291		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    292	};
    293
    294	uart0_data: uart0-data-pins {
    295		samsung,pins = "gpb7-0", "gpb7-1";
    296		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    297		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
    298		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    299	};
    300
    301	uart1_data: uart1-data-pins {
    302		samsung,pins = "gpb7-4", "gpb7-5";
    303		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    304		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
    305		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    306	};
    307
    308	spi0_bus: spi0-bus-pins {
    309		samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3";
    310		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    311		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    312		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    313	};
    314
    315	spi1_bus: spi1-bus-pins {
    316		samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7";
    317		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    318		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    319		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    320	};
    321
    322	spi2_bus: spi2-bus-pins {
    323		samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3";
    324		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
    325		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
    326		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    327	};
    328};
    329
    330&pinctrl_pmu {
    331	gpq0: gpq0-gpio-bank {
    332		gpio-controller;
    333		#gpio-cells = <2>;
    334	};
    335};