cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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k3-j721s2-som-p0.dtsi (2911B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * SoM: https://www.ti.com/lit/zip/sprr439
      4 *
      5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
      6 */
      7
      8/dts-v1/;
      9
     10#include "k3-j721s2.dtsi"
     11#include <dt-bindings/gpio/gpio.h>
     12
     13/ {
     14	memory@80000000 {
     15		device_type = "memory";
     16		/* 16 GB RAM */
     17		reg = <0x00 0x80000000 0x00 0x80000000>,
     18		      <0x08 0x80000000 0x03 0x80000000>;
     19	};
     20
     21	/* Reserving memory regions still pending */
     22	reserved_memory: reserved-memory {
     23		#address-cells = <2>;
     24		#size-cells = <2>;
     25		ranges;
     26
     27		secure_ddr: optee@9e800000 {
     28			reg = <0x00 0x9e800000 0x00 0x01800000>;
     29			alignment = <0x1000>;
     30			no-map;
     31		};
     32	};
     33
     34	transceiver0: can-phy0 {
     35		/* standby pin has been grounded by default */
     36		compatible = "ti,tcan1042";
     37		#phy-cells = <0>;
     38		max-bitrate = <5000000>;
     39	};
     40};
     41
     42&main_pmx0 {
     43	main_i2c0_pins_default: main-i2c0-pins-default {
     44		pinctrl-single,pins = <
     45			J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
     46			J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
     47		>;
     48	};
     49
     50	main_mcan16_pins_default: main-mcan16-pins-default {
     51		pinctrl-single,pins = <
     52			J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */
     53			J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */
     54		>;
     55	};
     56};
     57
     58&main_i2c0 {
     59	pinctrl-names = "default";
     60	pinctrl-0 = <&main_i2c0_pins_default>;
     61	clock-frequency = <400000>;
     62
     63	exp_som: gpio@21 {
     64		compatible = "ti,tca6408";
     65		reg = <0x21>;
     66		gpio-controller;
     67		#gpio-cells = <2>;
     68		gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
     69				  "CANUART_MUX2_SEL0", "CANUART_MUX_SEL1",
     70				  "GPIO_RGMII1_RST", "GPIO_eDP_ENABLE",
     71				   "GPIO_LIN_EN", "CAN_STB";
     72	};
     73};
     74
     75&main_mcan16 {
     76	pinctrl-0 = <&main_mcan16_pins_default>;
     77	pinctrl-names = "default";
     78	phys = <&transceiver0>;
     79};
     80
     81&mailbox0_cluster0 {
     82	status = "disabled";
     83};
     84
     85&mailbox0_cluster1 {
     86	status = "disabled";
     87};
     88
     89&mailbox0_cluster2 {
     90	status = "disabled";
     91};
     92
     93&mailbox0_cluster3 {
     94	status = "disabled";
     95};
     96
     97&mailbox0_cluster4 {
     98	status = "disabled";
     99};
    100
    101&mailbox0_cluster5 {
    102	status = "disabled";
    103};
    104
    105&mailbox0_cluster6 {
    106	status = "disabled";
    107};
    108
    109&mailbox0_cluster7 {
    110	status = "disabled";
    111};
    112
    113&mailbox0_cluster8 {
    114	status = "disabled";
    115};
    116
    117&mailbox0_cluster9 {
    118	status = "disabled";
    119};
    120
    121&mailbox0_cluster10 {
    122	status = "disabled";
    123};
    124
    125&mailbox0_cluster11 {
    126	status = "disabled";
    127};
    128
    129&mailbox1_cluster0 {
    130	status = "disabled";
    131};
    132
    133&mailbox1_cluster1 {
    134	status = "disabled";
    135};
    136
    137&mailbox1_cluster2 {
    138	status = "disabled";
    139};
    140
    141&mailbox1_cluster3 {
    142	status = "disabled";
    143};
    144
    145&mailbox1_cluster4 {
    146	status = "disabled";
    147};
    148
    149&mailbox1_cluster5 {
    150	status = "disabled";
    151};
    152
    153&mailbox1_cluster6 {
    154	status = "disabled";
    155};
    156
    157&mailbox1_cluster7 {
    158	status = "disabled";
    159};
    160
    161&mailbox1_cluster8 {
    162	status = "disabled";
    163};
    164
    165&mailbox1_cluster9 {
    166	status = "disabled";
    167};
    168
    169&mailbox1_cluster10 {
    170	status = "disabled";
    171};
    172
    173&mailbox1_cluster11 {
    174	status = "disabled";
    175};