zynqmp-zcu100-revC.dts (11577B)
1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * dts file for Xilinx ZynqMP ZCU100 revC 4 * 5 * (C) Copyright 2016 - 2021, Xilinx, Inc. 6 * 7 * Michal Simek <michal.simek@xilinx.com> 8 * Nathalie Chan King Choy 9 */ 10 11/dts-v1/; 12 13#include "zynqmp.dtsi" 14#include "zynqmp-clk-ccf.dtsi" 15#include <dt-bindings/input/input.h> 16#include <dt-bindings/interrupt-controller/irq.h> 17#include <dt-bindings/gpio/gpio.h> 18#include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19#include <dt-bindings/phy/phy.h> 20 21/ { 22 model = "ZynqMP ZCU100 RevC"; 23 compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp"; 24 25 aliases { 26 i2c0 = &i2c1; 27 rtc0 = &rtc; 28 serial0 = &uart1; 29 serial1 = &uart0; 30 serial2 = &dcc; 31 spi0 = &spi0; 32 spi1 = &spi1; 33 usb0 = &usb0; 34 usb1 = &usb1; 35 mmc0 = &sdhci0; 36 mmc1 = &sdhci1; 37 }; 38 39 chosen { 40 bootargs = "earlycon"; 41 stdout-path = "serial0:115200n8"; 42 }; 43 44 memory@0 { 45 device_type = "memory"; 46 reg = <0x0 0x0 0x0 0x80000000>; 47 }; 48 49 gpio-keys { 50 compatible = "gpio-keys"; 51 autorepeat; 52 sw4 { 53 label = "sw4"; 54 gpios = <&gpio 23 GPIO_ACTIVE_LOW>; 55 linux,code = <KEY_POWER>; 56 wakeup-source; 57 autorepeat; 58 }; 59 }; 60 61 leds { 62 compatible = "gpio-leds"; 63 led-ds2 { 64 label = "ds2"; 65 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>; 66 linux,default-trigger = "heartbeat"; 67 }; 68 69 led-ds3 { 70 label = "ds3"; 71 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; 72 linux,default-trigger = "phy0tx"; /* WLAN tx */ 73 default-state = "off"; 74 }; 75 76 led-ds4 { 77 label = "ds4"; 78 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; 79 linux,default-trigger = "phy0rx"; /* WLAN rx */ 80 default-state = "off"; 81 }; 82 83 led-ds5 { 84 label = "ds5"; 85 gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; 86 linux,default-trigger = "bluetooth-power"; 87 }; 88 89 vbus-det { /* U5 USB5744 VBUS detection via MIO25 */ 90 label = "vbus_det"; 91 gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; 92 default-state = "on"; 93 }; 94 }; 95 96 wmmcsdio_fixed: fixedregulator-mmcsdio { 97 compatible = "regulator-fixed"; 98 regulator-name = "wmmcsdio_fixed"; 99 regulator-min-microvolt = <3300000>; 100 regulator-max-microvolt = <3300000>; 101 regulator-always-on; 102 regulator-boot-on; 103 }; 104 105 sdio_pwrseq: sdio-pwrseq { 106 compatible = "mmc-pwrseq-simple"; 107 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */ 108 post-power-on-delay-ms = <10>; 109 }; 110 111 ina226 { 112 compatible = "iio-hwmon"; 113 io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>; 114 }; 115 116 si5335_0: si5335_0 { /* clk0_usb - u23 */ 117 compatible = "fixed-clock"; 118 #clock-cells = <0>; 119 clock-frequency = <26000000>; 120 }; 121 122 si5335_1: si5335_1 { /* clk1_dp - u23 */ 123 compatible = "fixed-clock"; 124 #clock-cells = <0>; 125 clock-frequency = <27000000>; 126 }; 127}; 128 129&dcc { 130 status = "okay"; 131}; 132 133&gpio { 134 status = "okay"; 135 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL", 136 "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS", 137 "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1", 138 "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1", 139 "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT", 140 "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE", 141 "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL", 142 "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C", 143 "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E", 144 "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3", 145 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", 146 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", 147 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", 148 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", 149 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", 150 "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */ 151 "", "", 152 "", "", "", "", "", "", "", "", "", "", 153 "", "", "", "", "", "", "", "", "", "", 154 "", "", "", "", "", "", "", "", "", "", 155 "", "", "", "", "", "", "", "", "", "", 156 "", "", "", "", "", "", "", "", "", "", 157 "", "", "", "", "", "", "", "", "", "", 158 "", "", "", "", "", "", "", "", "", "", 159 "", "", "", "", "", "", "", "", "", "", 160 "", "", "", "", "", "", "", "", "", "", 161 "", "", "", ""; 162}; 163 164&i2c1 { 165 status = "okay"; 166 pinctrl-names = "default", "gpio"; 167 pinctrl-0 = <&pinctrl_i2c1_default>; 168 pinctrl-1 = <&pinctrl_i2c1_gpio>; 169 scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; 170 sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; 171 clock-frequency = <100000>; 172 i2c-mux@75 { /* u11 */ 173 compatible = "nxp,pca9548"; 174 #address-cells = <1>; 175 #size-cells = <0>; 176 reg = <0x75>; 177 i2csw_0: i2c@0 { 178 #address-cells = <1>; 179 #size-cells = <0>; 180 reg = <0>; 181 label = "LS-I2C0"; 182 }; 183 i2csw_1: i2c@1 { 184 #address-cells = <1>; 185 #size-cells = <0>; 186 reg = <1>; 187 label = "LS-I2C1"; 188 }; 189 i2csw_2: i2c@2 { 190 #address-cells = <1>; 191 #size-cells = <0>; 192 reg = <2>; 193 label = "HS-I2C2"; 194 }; 195 i2csw_3: i2c@3 { 196 #address-cells = <1>; 197 #size-cells = <0>; 198 reg = <3>; 199 label = "HS-I2C3"; 200 }; 201 i2csw_4: i2c@4 { 202 #address-cells = <1>; 203 #size-cells = <0>; 204 reg = <0x4>; 205 206 pmic: pmic@5e { /* Custom TI PMIC u33 */ 207 compatible = "ti,tps65086"; 208 reg = <0x5e>; 209 interrupt-parent = <&gpio>; 210 interrupts = <77 IRQ_TYPE_LEVEL_LOW>; 211 #gpio-cells = <2>; 212 gpio-controller; 213 }; 214 }; 215 i2csw_5: i2c@5 { 216 #address-cells = <1>; 217 #size-cells = <0>; 218 reg = <5>; 219 /* PS_PMBUS */ 220 u35: ina226@40 { /* u35 */ 221 compatible = "ti,ina226"; 222 #io-channel-cells = <1>; 223 reg = <0x40>; 224 shunt-resistor = <10000>; 225 /* MIO31 is alert which should be routed to PMUFW */ 226 }; 227 }; 228 i2csw_6: i2c@6 { 229 #address-cells = <1>; 230 #size-cells = <0>; 231 reg = <6>; 232 /* 233 * Not Connected 234 */ 235 }; 236 i2csw_7: i2c@7 { 237 #address-cells = <1>; 238 #size-cells = <0>; 239 reg = <7>; 240 /* 241 * usb5744 (DNP) - U5 242 * 100kHz - this is default freq for us 243 */ 244 }; 245 }; 246}; 247 248&pinctrl0 { 249 status = "okay"; 250 pinctrl_i2c1_default: i2c1-default { 251 mux { 252 groups = "i2c1_1_grp"; 253 function = "i2c1"; 254 }; 255 256 conf { 257 groups = "i2c1_1_grp"; 258 bias-pull-up; 259 slew-rate = <SLEW_RATE_SLOW>; 260 power-source = <IO_STANDARD_LVCMOS18>; 261 }; 262 }; 263 264 pinctrl_i2c1_gpio: i2c1-gpio { 265 mux { 266 groups = "gpio0_4_grp", "gpio0_5_grp"; 267 function = "gpio0"; 268 }; 269 270 conf { 271 groups = "gpio0_4_grp", "gpio0_5_grp"; 272 slew-rate = <SLEW_RATE_SLOW>; 273 power-source = <IO_STANDARD_LVCMOS18>; 274 }; 275 }; 276 277 pinctrl_sdhci0_default: sdhci0-default { 278 mux { 279 groups = "sdio0_3_grp"; 280 function = "sdio0"; 281 }; 282 283 conf { 284 groups = "sdio0_3_grp"; 285 slew-rate = <SLEW_RATE_SLOW>; 286 power-source = <IO_STANDARD_LVCMOS18>; 287 bias-disable; 288 }; 289 290 mux-cd { 291 groups = "sdio0_cd_0_grp"; 292 function = "sdio0_cd"; 293 }; 294 295 conf-cd { 296 groups = "sdio0_cd_0_grp"; 297 bias-high-impedance; 298 bias-pull-up; 299 slew-rate = <SLEW_RATE_SLOW>; 300 power-source = <IO_STANDARD_LVCMOS18>; 301 }; 302 }; 303 304 pinctrl_sdhci1_default: sdhci1-default { 305 mux { 306 groups = "sdio1_2_grp"; 307 function = "sdio1"; 308 }; 309 310 conf { 311 groups = "sdio1_2_grp"; 312 slew-rate = <SLEW_RATE_SLOW>; 313 power-source = <IO_STANDARD_LVCMOS18>; 314 bias-disable; 315 }; 316 }; 317 318 pinctrl_spi0_default: spi0-default { 319 mux { 320 groups = "spi0_3_grp"; 321 function = "spi0"; 322 }; 323 324 conf { 325 groups = "spi0_3_grp"; 326 bias-disable; 327 slew-rate = <SLEW_RATE_SLOW>; 328 power-source = <IO_STANDARD_LVCMOS18>; 329 }; 330 331 mux-cs { 332 groups = "spi0_ss_9_grp"; 333 function = "spi0_ss"; 334 }; 335 336 conf-cs { 337 groups = "spi0_ss_9_grp"; 338 bias-disable; 339 }; 340 341 }; 342 343 pinctrl_spi1_default: spi1-default { 344 mux { 345 groups = "spi1_0_grp"; 346 function = "spi1"; 347 }; 348 349 conf { 350 groups = "spi1_0_grp"; 351 bias-disable; 352 slew-rate = <SLEW_RATE_SLOW>; 353 power-source = <IO_STANDARD_LVCMOS18>; 354 }; 355 356 mux-cs { 357 groups = "spi1_ss_0_grp"; 358 function = "spi1_ss"; 359 }; 360 361 conf-cs { 362 groups = "spi1_ss_0_grp"; 363 bias-disable; 364 }; 365 366 }; 367 368 pinctrl_uart0_default: uart0-default { 369 mux { 370 groups = "uart0_0_grp"; 371 function = "uart0"; 372 }; 373 374 conf { 375 groups = "uart0_0_grp"; 376 slew-rate = <SLEW_RATE_SLOW>; 377 power-source = <IO_STANDARD_LVCMOS18>; 378 }; 379 380 conf-rx { 381 pins = "MIO3"; 382 bias-high-impedance; 383 }; 384 385 conf-tx { 386 pins = "MIO2"; 387 bias-disable; 388 }; 389 }; 390 391 pinctrl_uart1_default: uart1-default { 392 mux { 393 groups = "uart1_0_grp"; 394 function = "uart1"; 395 }; 396 397 conf { 398 groups = "uart1_0_grp"; 399 slew-rate = <SLEW_RATE_SLOW>; 400 power-source = <IO_STANDARD_LVCMOS18>; 401 }; 402 403 conf-rx { 404 pins = "MIO1"; 405 bias-high-impedance; 406 }; 407 408 conf-tx { 409 pins = "MIO0"; 410 bias-disable; 411 }; 412 }; 413 414 pinctrl_usb0_default: usb0-default { 415 mux { 416 groups = "usb0_0_grp"; 417 function = "usb0"; 418 }; 419 420 conf { 421 groups = "usb0_0_grp"; 422 slew-rate = <SLEW_RATE_SLOW>; 423 power-source = <IO_STANDARD_LVCMOS18>; 424 }; 425 426 conf-rx { 427 pins = "MIO52", "MIO53", "MIO55"; 428 bias-high-impedance; 429 }; 430 431 conf-tx { 432 pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", 433 "MIO60", "MIO61", "MIO62", "MIO63"; 434 bias-disable; 435 }; 436 }; 437 438 pinctrl_usb1_default: usb1-default { 439 mux { 440 groups = "usb1_0_grp"; 441 function = "usb1"; 442 }; 443 444 conf { 445 groups = "usb1_0_grp"; 446 slew-rate = <SLEW_RATE_SLOW>; 447 power-source = <IO_STANDARD_LVCMOS18>; 448 }; 449 450 conf-rx { 451 pins = "MIO64", "MIO65", "MIO67"; 452 bias-high-impedance; 453 }; 454 455 conf-tx { 456 pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", 457 "MIO72", "MIO73", "MIO74", "MIO75"; 458 bias-disable; 459 }; 460 }; 461}; 462 463&psgtr { 464 status = "okay"; 465 /* usb3, dp */ 466 clocks = <&si5335_0>, <&si5335_1>; 467 clock-names = "ref0", "ref1"; 468}; 469 470&rtc { 471 status = "okay"; 472}; 473 474/* SD0 only supports 3.3V, no level shifter */ 475&sdhci0 { 476 status = "okay"; 477 no-1-8-v; 478 disable-wp; 479 pinctrl-names = "default"; 480 pinctrl-0 = <&pinctrl_sdhci0_default>; 481 xlnx,mio-bank = <0>; 482}; 483 484&sdhci1 { 485 status = "okay"; 486 bus-width = <0x4>; 487 pinctrl-names = "default"; 488 pinctrl-0 = <&pinctrl_sdhci1_default>; 489 xlnx,mio-bank = <0>; 490 non-removable; 491 disable-wp; 492 cap-power-off-card; 493 mmc-pwrseq = <&sdio_pwrseq>; 494 vqmmc-supply = <&wmmcsdio_fixed>; 495 #address-cells = <1>; 496 #size-cells = <0>; 497 wlcore: wifi@2 { 498 compatible = "ti,wl1831"; 499 reg = <2>; 500 interrupt-parent = <&gpio>; 501 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */ 502 }; 503}; 504 505&spi0 { /* Low Speed connector */ 506 status = "okay"; 507 label = "LS-SPI0"; 508 num-cs = <1>; 509 pinctrl-names = "default"; 510 pinctrl-0 = <&pinctrl_spi0_default>; 511}; 512 513&spi1 { /* High Speed connector */ 514 status = "okay"; 515 label = "HS-SPI1"; 516 num-cs = <1>; 517 pinctrl-names = "default"; 518 pinctrl-0 = <&pinctrl_spi1_default>; 519}; 520 521&uart0 { 522 status = "okay"; 523 pinctrl-names = "default"; 524 pinctrl-0 = <&pinctrl_uart0_default>; 525 bluetooth { 526 compatible = "ti,wl1831-st"; 527 enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; 528 }; 529}; 530 531&uart1 { 532 status = "okay"; 533 pinctrl-names = "default"; 534 pinctrl-0 = <&pinctrl_uart1_default>; 535}; 536 537/* ULPI SMSC USB3320 */ 538&usb0 { 539 status = "okay"; 540 pinctrl-names = "default"; 541 pinctrl-0 = <&pinctrl_usb0_default>; 542 phy-names = "usb3-phy"; 543 phys = <&psgtr 2 PHY_TYPE_USB3 0 0>; 544}; 545 546&dwc3_0 { 547 status = "okay"; 548 dr_mode = "peripheral"; 549 maximum-speed = "super-speed"; 550}; 551 552/* ULPI SMSC USB3320 */ 553&usb1 { 554 status = "okay"; 555 pinctrl-names = "default"; 556 pinctrl-0 = <&pinctrl_usb1_default>; 557 phy-names = "usb3-phy"; 558 phys = <&psgtr 3 PHY_TYPE_USB3 1 0>; 559}; 560 561&dwc3_1 { 562 status = "okay"; 563 dr_mode = "host"; 564 maximum-speed = "super-speed"; 565}; 566 567&watchdog0 { 568 status = "okay"; 569}; 570 571&zynqmp_dpdma { 572 status = "okay"; 573}; 574 575&zynqmp_dpsub { 576 status = "okay"; 577 phy-names = "dp-phy0", "dp-phy1"; 578 phys = <&psgtr 1 PHY_TYPE_DP 0 1>, 579 <&psgtr 0 PHY_TYPE_DP 1 1>; 580};