cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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acpi.h (4721B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 *  Copyright (C) 2013-2014, Linaro Ltd.
      4 *	Author: Al Stone <al.stone@linaro.org>
      5 *	Author: Graeme Gregory <graeme.gregory@linaro.org>
      6 *	Author: Hanjun Guo <hanjun.guo@linaro.org>
      7 */
      8
      9#ifndef _ASM_ACPI_H
     10#define _ASM_ACPI_H
     11
     12#include <linux/efi.h>
     13#include <linux/memblock.h>
     14#include <linux/psci.h>
     15#include <linux/stddef.h>
     16
     17#include <asm/cputype.h>
     18#include <asm/io.h>
     19#include <asm/ptrace.h>
     20#include <asm/smp_plat.h>
     21#include <asm/tlbflush.h>
     22
     23/* Macros for consistency checks of the GICC subtable of MADT */
     24
     25/*
     26 * MADT GICC minimum length refers to the MADT GICC structure table length as
     27 * defined in the earliest ACPI version supported on arm64, ie ACPI 5.1.
     28 *
     29 * The efficiency_class member was added to the
     30 * struct acpi_madt_generic_interrupt to represent the MADT GICC structure
     31 * "Processor Power Efficiency Class" field, added in ACPI 6.0 whose offset
     32 * is therefore used to delimit the MADT GICC structure minimum length
     33 * appropriately.
     34 */
     35#define ACPI_MADT_GICC_MIN_LENGTH   offsetof(  \
     36	struct acpi_madt_generic_interrupt, efficiency_class)
     37
     38#define BAD_MADT_GICC_ENTRY(entry, end)					\
     39	(!(entry) || (entry)->header.length < ACPI_MADT_GICC_MIN_LENGTH || \
     40	(unsigned long)(entry) + (entry)->header.length > (end))
     41
     42#define ACPI_MADT_GICC_SPE  (offsetof(struct acpi_madt_generic_interrupt, \
     43	spe_interrupt) + sizeof(u16))
     44
     45/* Basic configuration for ACPI */
     46#ifdef	CONFIG_ACPI
     47pgprot_t __acpi_get_mem_attribute(phys_addr_t addr);
     48
     49/* ACPI table mapping after acpi_permanent_mmap is set */
     50void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
     51#define acpi_os_ioremap acpi_os_ioremap
     52
     53typedef u64 phys_cpuid_t;
     54#define PHYS_CPUID_INVALID INVALID_HWID
     55
     56#define acpi_strict 1	/* No out-of-spec workarounds on ARM64 */
     57extern int acpi_disabled;
     58extern int acpi_noirq;
     59extern int acpi_pci_disabled;
     60
     61static inline void disable_acpi(void)
     62{
     63	acpi_disabled = 1;
     64	acpi_pci_disabled = 1;
     65	acpi_noirq = 1;
     66}
     67
     68static inline void enable_acpi(void)
     69{
     70	acpi_disabled = 0;
     71	acpi_pci_disabled = 0;
     72	acpi_noirq = 0;
     73}
     74
     75/*
     76 * The ACPI processor driver for ACPI core code needs this macro
     77 * to find out this cpu was already mapped (mapping from CPU hardware
     78 * ID to CPU logical ID) or not.
     79 */
     80#define cpu_physical_id(cpu) cpu_logical_map(cpu)
     81
     82/*
     83 * It's used from ACPI core in kdump to boot UP system with SMP kernel,
     84 * with this check the ACPI core will not override the CPU index
     85 * obtained from GICC with 0 and not print some error message as well.
     86 * Since MADT must provide at least one GICC structure for GIC
     87 * initialization, CPU will be always available in MADT on ARM64.
     88 */
     89static inline bool acpi_has_cpu_in_madt(void)
     90{
     91	return true;
     92}
     93
     94struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu);
     95static inline u32 get_acpi_id_for_cpu(unsigned int cpu)
     96{
     97	return	acpi_cpu_get_madt_gicc(cpu)->uid;
     98}
     99
    100static inline void arch_fix_phys_package_id(int num, u32 slot) { }
    101void __init acpi_init_cpus(void);
    102int apei_claim_sea(struct pt_regs *regs);
    103#else
    104static inline void acpi_init_cpus(void) { }
    105static inline int apei_claim_sea(struct pt_regs *regs) { return -ENOENT; }
    106#endif /* CONFIG_ACPI */
    107
    108#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
    109bool acpi_parking_protocol_valid(int cpu);
    110void __init
    111acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor);
    112#else
    113static inline bool acpi_parking_protocol_valid(int cpu) { return false; }
    114static inline void
    115acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)
    116{}
    117#endif
    118
    119static inline const char *acpi_get_enable_method(int cpu)
    120{
    121	if (acpi_psci_present())
    122		return "psci";
    123
    124	if (acpi_parking_protocol_valid(cpu))
    125		return "parking-protocol";
    126
    127	return NULL;
    128}
    129
    130#ifdef	CONFIG_ACPI_APEI
    131/*
    132 * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
    133 * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
    134 * with a kernel command line parameter "acpi=nocmcoff". But we don't
    135 * have this IA-32 specific feature on ARM64, this definition is only
    136 * for compatibility.
    137 */
    138#define acpi_disable_cmcff 1
    139static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
    140{
    141	return __acpi_get_mem_attribute(addr);
    142}
    143#endif /* CONFIG_ACPI_APEI */
    144
    145#ifdef CONFIG_ACPI_NUMA
    146int arm64_acpi_numa_init(void);
    147int acpi_numa_get_nid(unsigned int cpu);
    148void acpi_map_cpus_to_nodes(void);
    149#else
    150static inline int arm64_acpi_numa_init(void) { return -ENOSYS; }
    151static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
    152static inline void acpi_map_cpus_to_nodes(void) { }
    153#endif /* CONFIG_ACPI_NUMA */
    154
    155#define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE
    156
    157#endif /*_ASM_ACPI_H*/