cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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asm-extable.h (2518B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2#ifndef __ASM_ASM_EXTABLE_H
      3#define __ASM_ASM_EXTABLE_H
      4
      5#define EX_TYPE_NONE			0
      6#define EX_TYPE_FIXUP			1
      7#define EX_TYPE_BPF			2
      8#define EX_TYPE_UACCESS_ERR_ZERO	3
      9#define EX_TYPE_LOAD_UNALIGNED_ZEROPAD	4
     10
     11#ifdef __ASSEMBLY__
     12
     13#define __ASM_EXTABLE_RAW(insn, fixup, type, data)	\
     14	.pushsection	__ex_table, "a";		\
     15	.align		2;				\
     16	.long		((insn) - .);			\
     17	.long		((fixup) - .);			\
     18	.short		(type);				\
     19	.short		(data);				\
     20	.popsection;
     21
     22/*
     23 * Create an exception table entry for `insn`, which will branch to `fixup`
     24 * when an unhandled fault is taken.
     25 */
     26	.macro		_asm_extable, insn, fixup
     27	__ASM_EXTABLE_RAW(\insn, \fixup, EX_TYPE_FIXUP, 0)
     28	.endm
     29
     30/*
     31 * Create an exception table entry for `insn` if `fixup` is provided. Otherwise
     32 * do nothing.
     33 */
     34	.macro		_cond_extable, insn, fixup
     35	.ifnc		\fixup,
     36	_asm_extable	\insn, \fixup
     37	.endif
     38	.endm
     39
     40#else /* __ASSEMBLY__ */
     41
     42#include <linux/bits.h>
     43#include <linux/stringify.h>
     44
     45#include <asm/gpr-num.h>
     46
     47#define __ASM_EXTABLE_RAW(insn, fixup, type, data)	\
     48	".pushsection	__ex_table, \"a\"\n"		\
     49	".align		2\n"				\
     50	".long		((" insn ") - .)\n"		\
     51	".long		((" fixup ") - .)\n"		\
     52	".short		(" type ")\n"			\
     53	".short		(" data ")\n"			\
     54	".popsection\n"
     55
     56#define _ASM_EXTABLE(insn, fixup) \
     57	__ASM_EXTABLE_RAW(#insn, #fixup, __stringify(EX_TYPE_FIXUP), "0")
     58
     59#define EX_DATA_REG_ERR_SHIFT	0
     60#define EX_DATA_REG_ERR		GENMASK(4, 0)
     61#define EX_DATA_REG_ZERO_SHIFT	5
     62#define EX_DATA_REG_ZERO	GENMASK(9, 5)
     63
     64#define EX_DATA_REG(reg, gpr)						\
     65	"((.L__gpr_num_" #gpr ") << " __stringify(EX_DATA_REG_##reg##_SHIFT) ")"
     66
     67#define _ASM_EXTABLE_UACCESS_ERR_ZERO(insn, fixup, err, zero)		\
     68	__DEFINE_ASM_GPR_NUMS						\
     69	__ASM_EXTABLE_RAW(#insn, #fixup, 				\
     70			  __stringify(EX_TYPE_UACCESS_ERR_ZERO),	\
     71			  "("						\
     72			    EX_DATA_REG(ERR, err) " | "			\
     73			    EX_DATA_REG(ZERO, zero)			\
     74			  ")")
     75
     76#define _ASM_EXTABLE_UACCESS_ERR(insn, fixup, err)			\
     77	_ASM_EXTABLE_UACCESS_ERR_ZERO(insn, fixup, err, wzr)
     78
     79#define EX_DATA_REG_DATA_SHIFT	0
     80#define EX_DATA_REG_DATA	GENMASK(4, 0)
     81#define EX_DATA_REG_ADDR_SHIFT	5
     82#define EX_DATA_REG_ADDR	GENMASK(9, 5)
     83
     84#define _ASM_EXTABLE_LOAD_UNALIGNED_ZEROPAD(insn, fixup, data, addr)		\
     85	__DEFINE_ASM_GPR_NUMS							\
     86	__ASM_EXTABLE_RAW(#insn, #fixup,					\
     87			  __stringify(EX_TYPE_LOAD_UNALIGNED_ZEROPAD),		\
     88			  "("							\
     89			    EX_DATA_REG(DATA, data) " | "			\
     90			    EX_DATA_REG(ADDR, addr)				\
     91			  ")")
     92
     93#endif /* __ASSEMBLY__ */
     94
     95#endif /* __ASM_ASM_EXTABLE_H */