cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hyperv-tlfs.h (2187B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2
      3/*
      4 * This file contains definitions from the Hyper-V Hypervisor Top-Level
      5 * Functional Specification (TLFS):
      6 * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
      7 *
      8 * Copyright (C) 2021, Microsoft, Inc.
      9 *
     10 * Author : Michael Kelley <mikelley@microsoft.com>
     11 */
     12
     13#ifndef _ASM_HYPERV_TLFS_H
     14#define _ASM_HYPERV_TLFS_H
     15
     16#include <linux/types.h>
     17
     18/*
     19 * All data structures defined in the TLFS that are shared between Hyper-V
     20 * and a guest VM use Little Endian byte ordering.  This matches the default
     21 * byte ordering of Linux running on ARM64, so no special handling is required.
     22 */
     23
     24/*
     25 * These Hyper-V registers provide information equivalent to the CPUID
     26 * instruction on x86/x64.
     27 */
     28#define HV_REGISTER_HYPERVISOR_VERSION		0x00000100 /*CPUID 0x40000002 */
     29#define HV_REGISTER_FEATURES			0x00000200 /*CPUID 0x40000003 */
     30#define HV_REGISTER_ENLIGHTENMENTS		0x00000201 /*CPUID 0x40000004 */
     31
     32/*
     33 * Group C Features. See the asm-generic version of hyperv-tlfs.h
     34 * for a description of Feature Groups.
     35 */
     36
     37/* Crash MSRs available */
     38#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE	BIT(8)
     39
     40/* STIMER direct mode is available */
     41#define HV_STIMER_DIRECT_MODE_AVAILABLE		BIT(13)
     42
     43/*
     44 * Synthetic register definitions equivalent to MSRs on x86/x64
     45 */
     46#define HV_REGISTER_CRASH_P0		0x00000210
     47#define HV_REGISTER_CRASH_P1		0x00000211
     48#define HV_REGISTER_CRASH_P2		0x00000212
     49#define HV_REGISTER_CRASH_P3		0x00000213
     50#define HV_REGISTER_CRASH_P4		0x00000214
     51#define HV_REGISTER_CRASH_CTL		0x00000215
     52
     53#define HV_REGISTER_GUEST_OSID		0x00090002
     54#define HV_REGISTER_VP_INDEX		0x00090003
     55#define HV_REGISTER_TIME_REF_COUNT	0x00090004
     56#define HV_REGISTER_REFERENCE_TSC	0x00090017
     57
     58#define HV_REGISTER_SINT0		0x000A0000
     59#define HV_REGISTER_SCONTROL		0x000A0010
     60#define HV_REGISTER_SIEFP		0x000A0012
     61#define HV_REGISTER_SIMP		0x000A0013
     62#define HV_REGISTER_EOM			0x000A0014
     63
     64#define HV_REGISTER_STIMER0_CONFIG	0x000B0000
     65#define HV_REGISTER_STIMER0_COUNT	0x000B0001
     66
     67union hv_msi_entry {
     68	u64 as_uint64[2];
     69	struct {
     70		u64 address;
     71		u32 data;
     72		u32 reserved;
     73	} __packed;
     74};
     75
     76#include <asm-generic/hyperv-tlfs.h>
     77
     78#endif