cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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irq.c (2923B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Based on arch/arm/kernel/irq.c
      4 *
      5 * Copyright (C) 1992 Linus Torvalds
      6 * Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
      7 * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
      8 * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
      9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
     10 * Copyright (C) 2012 ARM Ltd.
     11 */
     12
     13#include <linux/irq.h>
     14#include <linux/memory.h>
     15#include <linux/smp.h>
     16#include <linux/hardirq.h>
     17#include <linux/init.h>
     18#include <linux/irqchip.h>
     19#include <linux/kprobes.h>
     20#include <linux/scs.h>
     21#include <linux/seq_file.h>
     22#include <linux/vmalloc.h>
     23#include <asm/daifflags.h>
     24#include <asm/vmap_stack.h>
     25
     26/* Only access this in an NMI enter/exit */
     27DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts);
     28
     29DEFINE_PER_CPU(unsigned long *, irq_stack_ptr);
     30
     31
     32DECLARE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr);
     33
     34#ifdef CONFIG_SHADOW_CALL_STACK
     35DEFINE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr);
     36#endif
     37
     38static void init_irq_scs(void)
     39{
     40	int cpu;
     41
     42	if (!IS_ENABLED(CONFIG_SHADOW_CALL_STACK))
     43		return;
     44
     45	for_each_possible_cpu(cpu)
     46		per_cpu(irq_shadow_call_stack_ptr, cpu) =
     47			scs_alloc(cpu_to_node(cpu));
     48}
     49
     50#ifdef CONFIG_VMAP_STACK
     51static void init_irq_stacks(void)
     52{
     53	int cpu;
     54	unsigned long *p;
     55
     56	for_each_possible_cpu(cpu) {
     57		p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu));
     58		per_cpu(irq_stack_ptr, cpu) = p;
     59	}
     60}
     61#else
     62/* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */
     63DEFINE_PER_CPU_ALIGNED(unsigned long [IRQ_STACK_SIZE/sizeof(long)], irq_stack);
     64
     65static void init_irq_stacks(void)
     66{
     67	int cpu;
     68
     69	for_each_possible_cpu(cpu)
     70		per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu);
     71}
     72#endif
     73
     74static void default_handle_irq(struct pt_regs *regs)
     75{
     76	panic("IRQ taken without a root IRQ handler\n");
     77}
     78
     79static void default_handle_fiq(struct pt_regs *regs)
     80{
     81	panic("FIQ taken without a root FIQ handler\n");
     82}
     83
     84void (*handle_arch_irq)(struct pt_regs *) __ro_after_init = default_handle_irq;
     85void (*handle_arch_fiq)(struct pt_regs *) __ro_after_init = default_handle_fiq;
     86
     87int __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
     88{
     89	if (handle_arch_irq != default_handle_irq)
     90		return -EBUSY;
     91
     92	handle_arch_irq = handle_irq;
     93	pr_info("Root IRQ handler: %ps\n", handle_irq);
     94	return 0;
     95}
     96
     97int __init set_handle_fiq(void (*handle_fiq)(struct pt_regs *))
     98{
     99	if (handle_arch_fiq != default_handle_fiq)
    100		return -EBUSY;
    101
    102	handle_arch_fiq = handle_fiq;
    103	pr_info("Root FIQ handler: %ps\n", handle_fiq);
    104	return 0;
    105}
    106
    107void __init init_IRQ(void)
    108{
    109	init_irq_stacks();
    110	init_irq_scs();
    111	irqchip_init();
    112
    113	if (system_uses_irq_prio_masking()) {
    114		/*
    115		 * Now that we have a stack for our IRQ handler, set
    116		 * the PMR/PSR pair to a consistent state.
    117		 */
    118		WARN_ON(read_sysreg(daif) & PSR_A_BIT);
    119		local_daif_restore(DAIF_PROCCTX_NOIRQ);
    120	}
    121}