cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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perf_regs.c (2291B)

      1// SPDX-License-Identifier: GPL-2.0
      2#include <linux/compat.h>
      3#include <linux/errno.h>
      4#include <linux/kernel.h>
      5#include <linux/perf_event.h>
      6#include <linux/bug.h>
      7#include <linux/sched/task_stack.h>
      8
      9#include <asm/perf_regs.h>
     10#include <asm/ptrace.h>
     11
     12u64 perf_reg_value(struct pt_regs *regs, int idx)
     13{
     14	if (WARN_ON_ONCE((u32)idx >= PERF_REG_ARM64_MAX))
     15		return 0;
     16
     17	/*
     18	 * Our handling of compat tasks (PERF_SAMPLE_REGS_ABI_32) is weird, but
     19	 * we're stuck with it for ABI compatibility reasons.
     20	 *
     21	 * For a 32-bit consumer inspecting a 32-bit task, then it will look at
     22	 * the first 16 registers (see arch/arm/include/uapi/asm/perf_regs.h).
     23	 * These correspond directly to a prefix of the registers saved in our
     24	 * 'struct pt_regs', with the exception of the PC, so we copy that down
     25	 * (x15 corresponds to SP_hyp in the architecture).
     26	 *
     27	 * So far, so good.
     28	 *
     29	 * The oddity arises when a 64-bit consumer looks at a 32-bit task and
     30	 * asks for registers beyond PERF_REG_ARM_MAX. In this case, we return
     31	 * SP_usr, LR_usr and PC in the positions where the AArch64 SP, LR and
     32	 * PC registers would normally live. The initial idea was to allow a
     33	 * 64-bit unwinder to unwind a 32-bit task and, although it's not clear
     34	 * how well that works in practice, somebody might be relying on it.
     35	 *
     36	 * At the time we make a sample, we don't know whether the consumer is
     37	 * 32-bit or 64-bit, so we have to cater for both possibilities.
     38	 */
     39	if (compat_user_mode(regs)) {
     40		if ((u32)idx == PERF_REG_ARM64_SP)
     41			return regs->compat_sp;
     42		if ((u32)idx == PERF_REG_ARM64_LR)
     43			return regs->compat_lr;
     44		if (idx == 15)
     45			return regs->pc;
     46	}
     47
     48	if ((u32)idx == PERF_REG_ARM64_SP)
     49		return regs->sp;
     50
     51	if ((u32)idx == PERF_REG_ARM64_PC)
     52		return regs->pc;
     53
     54	return regs->regs[idx];
     55}
     56
     57#define REG_RESERVED (~((1ULL << PERF_REG_ARM64_MAX) - 1))
     58
     59int perf_reg_validate(u64 mask)
     60{
     61	if (!mask || mask & REG_RESERVED)
     62		return -EINVAL;
     63
     64	return 0;
     65}
     66
     67u64 perf_reg_abi(struct task_struct *task)
     68{
     69	if (is_compat_thread(task_thread_info(task)))
     70		return PERF_SAMPLE_REGS_ABI_32;
     71	else
     72		return PERF_SAMPLE_REGS_ABI_64;
     73}
     74
     75void perf_get_regs_user(struct perf_regs *regs_user,
     76			struct pt_regs *regs)
     77{
     78	regs_user->regs = task_pt_regs(current);
     79	regs_user->abi = perf_reg_abi(current);
     80}