cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

timer-sr.c (1115B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2012-2015 - ARM Ltd
      4 * Author: Marc Zyngier <marc.zyngier@arm.com>
      5 */
      6
      7#include <clocksource/arm_arch_timer.h>
      8#include <linux/compiler.h>
      9#include <linux/kvm_host.h>
     10
     11#include <asm/kvm_hyp.h>
     12
     13void __kvm_timer_set_cntvoff(u64 cntvoff)
     14{
     15	write_sysreg(cntvoff, cntvoff_el2);
     16}
     17
     18/*
     19 * Should only be called on non-VHE systems.
     20 * VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
     21 */
     22void __timer_disable_traps(struct kvm_vcpu *vcpu)
     23{
     24	u64 val;
     25
     26	/* Allow physical timer/counter access for the host */
     27	val = read_sysreg(cnthctl_el2);
     28	val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN;
     29	write_sysreg(val, cnthctl_el2);
     30}
     31
     32/*
     33 * Should only be called on non-VHE systems.
     34 * VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
     35 */
     36void __timer_enable_traps(struct kvm_vcpu *vcpu)
     37{
     38	u64 val;
     39
     40	/*
     41	 * Disallow physical timer access for the guest
     42	 * Physical counter access is allowed
     43	 */
     44	val = read_sysreg(cnthctl_el2);
     45	val &= ~CNTHCTL_EL1PCEN;
     46	val |= CNTHCTL_EL1PCTEN;
     47	write_sysreg(val, cnthctl_el2);
     48}