cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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vgic-v4.c (14434B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2017 ARM Ltd.
      4 * Author: Marc Zyngier <marc.zyngier@arm.com>
      5 */
      6
      7#include <linux/interrupt.h>
      8#include <linux/irq.h>
      9#include <linux/irqdomain.h>
     10#include <linux/kvm_host.h>
     11#include <linux/irqchip/arm-gic-v3.h>
     12
     13#include "vgic.h"
     14
     15/*
     16 * How KVM uses GICv4 (insert rude comments here):
     17 *
     18 * The vgic-v4 layer acts as a bridge between several entities:
     19 * - The GICv4 ITS representation offered by the ITS driver
     20 * - VFIO, which is in charge of the PCI endpoint
     21 * - The virtual ITS, which is the only thing the guest sees
     22 *
     23 * The configuration of VLPIs is triggered by a callback from VFIO,
     24 * instructing KVM that a PCI device has been configured to deliver
     25 * MSIs to a vITS.
     26 *
     27 * kvm_vgic_v4_set_forwarding() is thus called with the routing entry,
     28 * and this is used to find the corresponding vITS data structures
     29 * (ITS instance, device, event and irq) using a process that is
     30 * extremely similar to the injection of an MSI.
     31 *
     32 * At this stage, we can link the guest's view of an LPI (uniquely
     33 * identified by the routing entry) and the host irq, using the GICv4
     34 * driver mapping operation. Should the mapping succeed, we've then
     35 * successfully upgraded the guest's LPI to a VLPI. We can then start
     36 * with updating GICv4's view of the property table and generating an
     37 * INValidation in order to kickstart the delivery of this VLPI to the
     38 * guest directly, without software intervention. Well, almost.
     39 *
     40 * When the PCI endpoint is deconfigured, this operation is reversed
     41 * with VFIO calling kvm_vgic_v4_unset_forwarding().
     42 *
     43 * Once the VLPI has been mapped, it needs to follow any change the
     44 * guest performs on its LPI through the vITS. For that, a number of
     45 * command handlers have hooks to communicate these changes to the HW:
     46 * - Any invalidation triggers a call to its_prop_update_vlpi()
     47 * - The INT command results in a irq_set_irqchip_state(), which
     48 *   generates an INT on the corresponding VLPI.
     49 * - The CLEAR command results in a irq_set_irqchip_state(), which
     50 *   generates an CLEAR on the corresponding VLPI.
     51 * - DISCARD translates into an unmap, similar to a call to
     52 *   kvm_vgic_v4_unset_forwarding().
     53 * - MOVI is translated by an update of the existing mapping, changing
     54 *   the target vcpu, resulting in a VMOVI being generated.
     55 * - MOVALL is translated by a string of mapping updates (similar to
     56 *   the handling of MOVI). MOVALL is horrible.
     57 *
     58 * Note that a DISCARD/MAPTI sequence emitted from the guest without
     59 * reprogramming the PCI endpoint after MAPTI does not result in a
     60 * VLPI being mapped, as there is no callback from VFIO (the guest
     61 * will get the interrupt via the normal SW injection). Fixing this is
     62 * not trivial, and requires some horrible messing with the VFIO
     63 * internals. Not fun. Don't do that.
     64 *
     65 * Then there is the scheduling. Each time a vcpu is about to run on a
     66 * physical CPU, KVM must tell the corresponding redistributor about
     67 * it. And if we've migrated our vcpu from one CPU to another, we must
     68 * tell the ITS (so that the messages reach the right redistributor).
     69 * This is done in two steps: first issue a irq_set_affinity() on the
     70 * irq corresponding to the vcpu, then call its_make_vpe_resident().
     71 * You must be in a non-preemptible context. On exit, a call to
     72 * its_make_vpe_non_resident() tells the redistributor that we're done
     73 * with the vcpu.
     74 *
     75 * Finally, the doorbell handling: Each vcpu is allocated an interrupt
     76 * which will fire each time a VLPI is made pending whilst the vcpu is
     77 * not running. Each time the vcpu gets blocked, the doorbell
     78 * interrupt gets enabled. When the vcpu is unblocked (for whatever
     79 * reason), the doorbell interrupt is disabled.
     80 */
     81
     82#define DB_IRQ_FLAGS	(IRQ_NOAUTOEN | IRQ_DISABLE_UNLAZY | IRQ_NO_BALANCING)
     83
     84static irqreturn_t vgic_v4_doorbell_handler(int irq, void *info)
     85{
     86	struct kvm_vcpu *vcpu = info;
     87
     88	/* We got the message, no need to fire again */
     89	if (!kvm_vgic_global_state.has_gicv4_1 &&
     90	    !irqd_irq_disabled(&irq_to_desc(irq)->irq_data))
     91		disable_irq_nosync(irq);
     92
     93	/*
     94	 * The v4.1 doorbell can fire concurrently with the vPE being
     95	 * made non-resident. Ensure we only update pending_last
     96	 * *after* the non-residency sequence has completed.
     97	 */
     98	raw_spin_lock(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vpe_lock);
     99	vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last = true;
    100	raw_spin_unlock(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vpe_lock);
    101
    102	kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
    103	kvm_vcpu_kick(vcpu);
    104
    105	return IRQ_HANDLED;
    106}
    107
    108static void vgic_v4_sync_sgi_config(struct its_vpe *vpe, struct vgic_irq *irq)
    109{
    110	vpe->sgi_config[irq->intid].enabled	= irq->enabled;
    111	vpe->sgi_config[irq->intid].group 	= irq->group;
    112	vpe->sgi_config[irq->intid].priority	= irq->priority;
    113}
    114
    115static void vgic_v4_enable_vsgis(struct kvm_vcpu *vcpu)
    116{
    117	struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
    118	int i;
    119
    120	/*
    121	 * With GICv4.1, every virtual SGI can be directly injected. So
    122	 * let's pretend that they are HW interrupts, tied to a host
    123	 * IRQ. The SGI code will do its magic.
    124	 */
    125	for (i = 0; i < VGIC_NR_SGIS; i++) {
    126		struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, i);
    127		struct irq_desc *desc;
    128		unsigned long flags;
    129		int ret;
    130
    131		raw_spin_lock_irqsave(&irq->irq_lock, flags);
    132
    133		if (irq->hw)
    134			goto unlock;
    135
    136		irq->hw = true;
    137		irq->host_irq = irq_find_mapping(vpe->sgi_domain, i);
    138
    139		/* Transfer the full irq state to the vPE */
    140		vgic_v4_sync_sgi_config(vpe, irq);
    141		desc = irq_to_desc(irq->host_irq);
    142		ret = irq_domain_activate_irq(irq_desc_get_irq_data(desc),
    143					      false);
    144		if (!WARN_ON(ret)) {
    145			/* Transfer pending state */
    146			ret = irq_set_irqchip_state(irq->host_irq,
    147						    IRQCHIP_STATE_PENDING,
    148						    irq->pending_latch);
    149			WARN_ON(ret);
    150			irq->pending_latch = false;
    151		}
    152	unlock:
    153		raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
    154		vgic_put_irq(vcpu->kvm, irq);
    155	}
    156}
    157
    158static void vgic_v4_disable_vsgis(struct kvm_vcpu *vcpu)
    159{
    160	int i;
    161
    162	for (i = 0; i < VGIC_NR_SGIS; i++) {
    163		struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, i);
    164		struct irq_desc *desc;
    165		unsigned long flags;
    166		int ret;
    167
    168		raw_spin_lock_irqsave(&irq->irq_lock, flags);
    169
    170		if (!irq->hw)
    171			goto unlock;
    172
    173		irq->hw = false;
    174		ret = irq_get_irqchip_state(irq->host_irq,
    175					    IRQCHIP_STATE_PENDING,
    176					    &irq->pending_latch);
    177		WARN_ON(ret);
    178
    179		desc = irq_to_desc(irq->host_irq);
    180		irq_domain_deactivate_irq(irq_desc_get_irq_data(desc));
    181	unlock:
    182		raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
    183		vgic_put_irq(vcpu->kvm, irq);
    184	}
    185}
    186
    187/* Must be called with the kvm lock held */
    188void vgic_v4_configure_vsgis(struct kvm *kvm)
    189{
    190	struct vgic_dist *dist = &kvm->arch.vgic;
    191	struct kvm_vcpu *vcpu;
    192	unsigned long i;
    193
    194	kvm_arm_halt_guest(kvm);
    195
    196	kvm_for_each_vcpu(i, vcpu, kvm) {
    197		if (dist->nassgireq)
    198			vgic_v4_enable_vsgis(vcpu);
    199		else
    200			vgic_v4_disable_vsgis(vcpu);
    201	}
    202
    203	kvm_arm_resume_guest(kvm);
    204}
    205
    206/*
    207 * Must be called with GICv4.1 and the vPE unmapped, which
    208 * indicates the invalidation of any VPT caches associated
    209 * with the vPE, thus we can get the VLPI state by peeking
    210 * at the VPT.
    211 */
    212void vgic_v4_get_vlpi_state(struct vgic_irq *irq, bool *val)
    213{
    214	struct its_vpe *vpe = &irq->target_vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
    215	int mask = BIT(irq->intid % BITS_PER_BYTE);
    216	void *va;
    217	u8 *ptr;
    218
    219	va = page_address(vpe->vpt_page);
    220	ptr = va + irq->intid / BITS_PER_BYTE;
    221
    222	*val = !!(*ptr & mask);
    223}
    224
    225/**
    226 * vgic_v4_init - Initialize the GICv4 data structures
    227 * @kvm:	Pointer to the VM being initialized
    228 *
    229 * We may be called each time a vITS is created, or when the
    230 * vgic is initialized. This relies on kvm->lock to be
    231 * held. In both cases, the number of vcpus should now be
    232 * fixed.
    233 */
    234int vgic_v4_init(struct kvm *kvm)
    235{
    236	struct vgic_dist *dist = &kvm->arch.vgic;
    237	struct kvm_vcpu *vcpu;
    238	int nr_vcpus, ret;
    239	unsigned long i;
    240
    241	if (!kvm_vgic_global_state.has_gicv4)
    242		return 0; /* Nothing to see here... move along. */
    243
    244	if (dist->its_vm.vpes)
    245		return 0;
    246
    247	nr_vcpus = atomic_read(&kvm->online_vcpus);
    248
    249	dist->its_vm.vpes = kcalloc(nr_vcpus, sizeof(*dist->its_vm.vpes),
    250				    GFP_KERNEL_ACCOUNT);
    251	if (!dist->its_vm.vpes)
    252		return -ENOMEM;
    253
    254	dist->its_vm.nr_vpes = nr_vcpus;
    255
    256	kvm_for_each_vcpu(i, vcpu, kvm)
    257		dist->its_vm.vpes[i] = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
    258
    259	ret = its_alloc_vcpu_irqs(&dist->its_vm);
    260	if (ret < 0) {
    261		kvm_err("VPE IRQ allocation failure\n");
    262		kfree(dist->its_vm.vpes);
    263		dist->its_vm.nr_vpes = 0;
    264		dist->its_vm.vpes = NULL;
    265		return ret;
    266	}
    267
    268	kvm_for_each_vcpu(i, vcpu, kvm) {
    269		int irq = dist->its_vm.vpes[i]->irq;
    270		unsigned long irq_flags = DB_IRQ_FLAGS;
    271
    272		/*
    273		 * Don't automatically enable the doorbell, as we're
    274		 * flipping it back and forth when the vcpu gets
    275		 * blocked. Also disable the lazy disabling, as the
    276		 * doorbell could kick us out of the guest too
    277		 * early...
    278		 *
    279		 * On GICv4.1, the doorbell is managed in HW and must
    280		 * be left enabled.
    281		 */
    282		if (kvm_vgic_global_state.has_gicv4_1)
    283			irq_flags &= ~IRQ_NOAUTOEN;
    284		irq_set_status_flags(irq, irq_flags);
    285
    286		ret = request_irq(irq, vgic_v4_doorbell_handler,
    287				  0, "vcpu", vcpu);
    288		if (ret) {
    289			kvm_err("failed to allocate vcpu IRQ%d\n", irq);
    290			/*
    291			 * Trick: adjust the number of vpes so we know
    292			 * how many to nuke on teardown...
    293			 */
    294			dist->its_vm.nr_vpes = i;
    295			break;
    296		}
    297	}
    298
    299	if (ret)
    300		vgic_v4_teardown(kvm);
    301
    302	return ret;
    303}
    304
    305/**
    306 * vgic_v4_teardown - Free the GICv4 data structures
    307 * @kvm:	Pointer to the VM being destroyed
    308 *
    309 * Relies on kvm->lock to be held.
    310 */
    311void vgic_v4_teardown(struct kvm *kvm)
    312{
    313	struct its_vm *its_vm = &kvm->arch.vgic.its_vm;
    314	int i;
    315
    316	if (!its_vm->vpes)
    317		return;
    318
    319	for (i = 0; i < its_vm->nr_vpes; i++) {
    320		struct kvm_vcpu *vcpu = kvm_get_vcpu(kvm, i);
    321		int irq = its_vm->vpes[i]->irq;
    322
    323		irq_clear_status_flags(irq, DB_IRQ_FLAGS);
    324		free_irq(irq, vcpu);
    325	}
    326
    327	its_free_vcpu_irqs(its_vm);
    328	kfree(its_vm->vpes);
    329	its_vm->nr_vpes = 0;
    330	its_vm->vpes = NULL;
    331}
    332
    333int vgic_v4_put(struct kvm_vcpu *vcpu, bool need_db)
    334{
    335	struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
    336
    337	if (!vgic_supports_direct_msis(vcpu->kvm) || !vpe->resident)
    338		return 0;
    339
    340	return its_make_vpe_non_resident(vpe, need_db);
    341}
    342
    343int vgic_v4_load(struct kvm_vcpu *vcpu)
    344{
    345	struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
    346	int err;
    347
    348	if (!vgic_supports_direct_msis(vcpu->kvm) || vpe->resident)
    349		return 0;
    350
    351	/*
    352	 * Before making the VPE resident, make sure the redistributor
    353	 * corresponding to our current CPU expects us here. See the
    354	 * doc in drivers/irqchip/irq-gic-v4.c to understand how this
    355	 * turns into a VMOVP command at the ITS level.
    356	 */
    357	err = irq_set_affinity(vpe->irq, cpumask_of(smp_processor_id()));
    358	if (err)
    359		return err;
    360
    361	err = its_make_vpe_resident(vpe, false, vcpu->kvm->arch.vgic.enabled);
    362	if (err)
    363		return err;
    364
    365	/*
    366	 * Now that the VPE is resident, let's get rid of a potential
    367	 * doorbell interrupt that would still be pending. This is a
    368	 * GICv4.0 only "feature"...
    369	 */
    370	if (!kvm_vgic_global_state.has_gicv4_1)
    371		err = irq_set_irqchip_state(vpe->irq, IRQCHIP_STATE_PENDING, false);
    372
    373	return err;
    374}
    375
    376void vgic_v4_commit(struct kvm_vcpu *vcpu)
    377{
    378	struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
    379
    380	/*
    381	 * No need to wait for the vPE to be ready across a shallow guest
    382	 * exit, as only a vcpu_put will invalidate it.
    383	 */
    384	if (!vpe->ready)
    385		its_commit_vpe(vpe);
    386}
    387
    388static struct vgic_its *vgic_get_its(struct kvm *kvm,
    389				     struct kvm_kernel_irq_routing_entry *irq_entry)
    390{
    391	struct kvm_msi msi  = (struct kvm_msi) {
    392		.address_lo	= irq_entry->msi.address_lo,
    393		.address_hi	= irq_entry->msi.address_hi,
    394		.data		= irq_entry->msi.data,
    395		.flags		= irq_entry->msi.flags,
    396		.devid		= irq_entry->msi.devid,
    397	};
    398
    399	return vgic_msi_to_its(kvm, &msi);
    400}
    401
    402int kvm_vgic_v4_set_forwarding(struct kvm *kvm, int virq,
    403			       struct kvm_kernel_irq_routing_entry *irq_entry)
    404{
    405	struct vgic_its *its;
    406	struct vgic_irq *irq;
    407	struct its_vlpi_map map;
    408	unsigned long flags;
    409	int ret;
    410
    411	if (!vgic_supports_direct_msis(kvm))
    412		return 0;
    413
    414	/*
    415	 * Get the ITS, and escape early on error (not a valid
    416	 * doorbell for any of our vITSs).
    417	 */
    418	its = vgic_get_its(kvm, irq_entry);
    419	if (IS_ERR(its))
    420		return 0;
    421
    422	mutex_lock(&its->its_lock);
    423
    424	/* Perform the actual DevID/EventID -> LPI translation. */
    425	ret = vgic_its_resolve_lpi(kvm, its, irq_entry->msi.devid,
    426				   irq_entry->msi.data, &irq);
    427	if (ret)
    428		goto out;
    429
    430	/*
    431	 * Emit the mapping request. If it fails, the ITS probably
    432	 * isn't v4 compatible, so let's silently bail out. Holding
    433	 * the ITS lock should ensure that nothing can modify the
    434	 * target vcpu.
    435	 */
    436	map = (struct its_vlpi_map) {
    437		.vm		= &kvm->arch.vgic.its_vm,
    438		.vpe		= &irq->target_vcpu->arch.vgic_cpu.vgic_v3.its_vpe,
    439		.vintid		= irq->intid,
    440		.properties	= ((irq->priority & 0xfc) |
    441				   (irq->enabled ? LPI_PROP_ENABLED : 0) |
    442				   LPI_PROP_GROUP1),
    443		.db_enabled	= true,
    444	};
    445
    446	ret = its_map_vlpi(virq, &map);
    447	if (ret)
    448		goto out;
    449
    450	irq->hw		= true;
    451	irq->host_irq	= virq;
    452	atomic_inc(&map.vpe->vlpi_count);
    453
    454	/* Transfer pending state */
    455	raw_spin_lock_irqsave(&irq->irq_lock, flags);
    456	if (irq->pending_latch) {
    457		ret = irq_set_irqchip_state(irq->host_irq,
    458					    IRQCHIP_STATE_PENDING,
    459					    irq->pending_latch);
    460		WARN_RATELIMIT(ret, "IRQ %d", irq->host_irq);
    461
    462		/*
    463		 * Clear pending_latch and communicate this state
    464		 * change via vgic_queue_irq_unlock.
    465		 */
    466		irq->pending_latch = false;
    467		vgic_queue_irq_unlock(kvm, irq, flags);
    468	} else {
    469		raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
    470	}
    471
    472out:
    473	mutex_unlock(&its->its_lock);
    474	return ret;
    475}
    476
    477int kvm_vgic_v4_unset_forwarding(struct kvm *kvm, int virq,
    478				 struct kvm_kernel_irq_routing_entry *irq_entry)
    479{
    480	struct vgic_its *its;
    481	struct vgic_irq *irq;
    482	int ret;
    483
    484	if (!vgic_supports_direct_msis(kvm))
    485		return 0;
    486
    487	/*
    488	 * Get the ITS, and escape early on error (not a valid
    489	 * doorbell for any of our vITSs).
    490	 */
    491	its = vgic_get_its(kvm, irq_entry);
    492	if (IS_ERR(its))
    493		return 0;
    494
    495	mutex_lock(&its->its_lock);
    496
    497	ret = vgic_its_resolve_lpi(kvm, its, irq_entry->msi.devid,
    498				   irq_entry->msi.data, &irq);
    499	if (ret)
    500		goto out;
    501
    502	WARN_ON(!(irq->hw && irq->host_irq == virq));
    503	if (irq->hw) {
    504		atomic_dec(&irq->target_vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count);
    505		irq->hw = false;
    506		ret = its_unmap_vlpi(virq);
    507	}
    508
    509out:
    510	mutex_unlock(&its->its_lock);
    511	return ret;
    512}