cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

Kconfig (7301B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2config CSKY
      3	def_bool y
      4	select ARCH_32BIT_OFF_T
      5	select ARCH_HAS_DMA_PREP_COHERENT
      6	select ARCH_HAS_GCOV_PROFILE_ALL
      7	select ARCH_HAS_SYNC_DMA_FOR_CPU
      8	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
      9	select ARCH_USE_BUILTIN_BSWAP
     10	select ARCH_USE_QUEUED_RWLOCKS
     11	select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
     12	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
     13	select COMMON_CLK
     14	select CLKSRC_MMIO
     15	select CSKY_MPINTC if CPU_CK860
     16	select CSKY_MP_TIMER if CPU_CK860
     17	select CSKY_APB_INTC
     18	select DMA_DIRECT_REMAP
     19	select IRQ_DOMAIN
     20	select DW_APB_TIMER_OF
     21	select GENERIC_IOREMAP
     22	select GENERIC_LIB_ASHLDI3
     23	select GENERIC_LIB_ASHRDI3
     24	select GENERIC_LIB_LSHRDI3
     25	select GENERIC_LIB_MULDI3
     26	select GENERIC_LIB_CMPDI2
     27	select GENERIC_LIB_UCMPDI2
     28	select GENERIC_ALLOCATOR
     29	select GENERIC_ATOMIC64
     30	select GENERIC_CPU_DEVICES
     31	select GENERIC_IRQ_CHIP
     32	select GENERIC_IRQ_PROBE
     33	select GENERIC_IRQ_SHOW
     34	select GENERIC_IRQ_MULTI_HANDLER
     35	select GENERIC_SCHED_CLOCK
     36	select GENERIC_SMP_IDLE_THREAD
     37	select GENERIC_TIME_VSYSCALL
     38	select GENERIC_VDSO_32
     39	select GENERIC_GETTIMEOFDAY
     40	select GX6605S_TIMER if CPU_CK610
     41	select HAVE_ARCH_TRACEHOOK
     42	select HAVE_ARCH_AUDITSYSCALL
     43	select HAVE_ARCH_MMAP_RND_BITS
     44	select HAVE_ARCH_SECCOMP_FILTER
     45	select HAVE_CONTEXT_TRACKING
     46	select HAVE_VIRT_CPU_ACCOUNTING_GEN
     47	select HAVE_DEBUG_BUGVERBOSE
     48	select HAVE_DEBUG_KMEMLEAK
     49	select HAVE_DYNAMIC_FTRACE
     50	select HAVE_DYNAMIC_FTRACE_WITH_REGS
     51	select HAVE_GENERIC_VDSO
     52	select HAVE_FUNCTION_TRACER
     53	select HAVE_FUNCTION_GRAPH_TRACER
     54	select HAVE_FUNCTION_ERROR_INJECTION
     55	select HAVE_FTRACE_MCOUNT_RECORD
     56	select HAVE_KERNEL_GZIP
     57	select HAVE_KERNEL_LZO
     58	select HAVE_KERNEL_LZMA
     59	select HAVE_KPROBES if !CPU_CK610
     60	select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
     61	select HAVE_KRETPROBES if !CPU_CK610
     62	select HAVE_PERF_EVENTS
     63	select HAVE_PERF_REGS
     64	select HAVE_PERF_USER_STACK_DUMP
     65	select HAVE_DMA_CONTIGUOUS
     66	select HAVE_REGS_AND_STACK_ACCESS_API
     67	select HAVE_RSEQ
     68	select HAVE_STACKPROTECTOR
     69	select HAVE_SYSCALL_TRACEPOINTS
     70	select MAY_HAVE_SPARSE_IRQ
     71	select MODULES_USE_ELF_RELA if MODULES
     72	select OF
     73	select OF_EARLY_FLATTREE
     74	select PERF_USE_VMALLOC if CPU_CK610
     75	select RTC_LIB
     76	select TIMER_OF
     77	select GENERIC_PCI_IOMAP
     78	select HAVE_PCI
     79	select PCI_DOMAINS_GENERIC if PCI
     80	select PCI_SYSCALL if PCI
     81	select PCI_MSI if PCI
     82	select TRACE_IRQFLAGS_SUPPORT
     83
     84config LOCKDEP_SUPPORT
     85	def_bool y
     86
     87config ARCH_SUPPORTS_UPROBES
     88	def_bool y if !CPU_CK610
     89
     90config CPU_HAS_CACHEV2
     91	bool
     92
     93config CPU_HAS_FPUV2
     94	bool
     95
     96config CPU_HAS_HILO
     97	bool
     98
     99config CPU_HAS_TLBI
    100	bool
    101
    102config CPU_HAS_LDSTEX
    103	bool
    104	help
    105	  For SMP, CPU needs "ldex&stex" instructions for atomic operations.
    106
    107config CPU_NEED_TLBSYNC
    108	bool
    109
    110config CPU_NEED_SOFTALIGN
    111	bool
    112
    113config CPU_NO_USER_BKPT
    114	bool
    115	help
    116	  For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
    117	  abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
    118	  So we need a 16bit instruction as user space bkpt, and it will cause an illegal
    119	  instruction exception.
    120	  In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
    121
    122config GENERIC_CALIBRATE_DELAY
    123	def_bool y
    124
    125config GENERIC_CSUM
    126	def_bool y
    127
    128config GENERIC_HWEIGHT
    129	def_bool y
    130
    131config MMU
    132	def_bool y
    133
    134config STACKTRACE_SUPPORT
    135	def_bool y
    136
    137config TIME_LOW_RES
    138	def_bool y
    139
    140config CPU_TLB_SIZE
    141	int
    142	default "128"	if (CPU_CK610 || CPU_CK807 || CPU_CK810)
    143	default "1024"	if (CPU_CK860)
    144
    145config CPU_ASID_BITS
    146	int
    147	default "8"	if (CPU_CK610 || CPU_CK807 || CPU_CK810)
    148	default "12"	if (CPU_CK860)
    149
    150config L1_CACHE_SHIFT
    151	int
    152	default "4"	if (CPU_CK610)
    153	default "5"	if (CPU_CK807 || CPU_CK810)
    154	default "6"	if (CPU_CK860)
    155
    156config ARCH_MMAP_RND_BITS_MIN
    157	default 8
    158
    159# max bits determined by the following formula:
    160#  VA_BITS - PAGE_SHIFT - 3
    161config ARCH_MMAP_RND_BITS_MAX
    162	default 17
    163
    164menu "Processor type and features"
    165
    166choice
    167	prompt "CPU MODEL"
    168	default CPU_CK807
    169
    170config CPU_CK610
    171	bool "CSKY CPU ck610"
    172	select CPU_NEED_TLBSYNC
    173	select CPU_NEED_SOFTALIGN
    174	select CPU_NO_USER_BKPT
    175
    176config CPU_CK810
    177	bool "CSKY CPU ck810"
    178	select CPU_HAS_HILO
    179	select CPU_NEED_TLBSYNC
    180
    181config CPU_CK807
    182	bool "CSKY CPU ck807"
    183	select CPU_HAS_HILO
    184
    185config CPU_CK860
    186	bool "CSKY CPU ck860"
    187	select CPU_HAS_TLBI
    188	select CPU_HAS_CACHEV2
    189	select CPU_HAS_LDSTEX
    190	select CPU_HAS_FPUV2
    191endchoice
    192
    193choice
    194	prompt "PAGE OFFSET"
    195	default PAGE_OFFSET_80000000
    196
    197config PAGE_OFFSET_80000000
    198	bool "PAGE OFFSET 2G (user:kernel = 2:2)"
    199
    200config PAGE_OFFSET_A0000000
    201	bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
    202endchoice
    203
    204config PAGE_OFFSET
    205	hex
    206	default 0x80000000 if PAGE_OFFSET_80000000
    207	default 0xa0000000 if PAGE_OFFSET_A0000000
    208choice
    209
    210	prompt "C-SKY PMU type"
    211	depends on PERF_EVENTS
    212	depends on CPU_CK807 || CPU_CK810 || CPU_CK860
    213
    214config CPU_PMU_NONE
    215	bool "None"
    216
    217config CSKY_PMU_V1
    218	bool "Performance Monitoring Unit Ver.1"
    219
    220endchoice
    221
    222choice
    223	prompt "Power Manager Instruction (wait/doze/stop)"
    224	default CPU_PM_NONE
    225
    226config CPU_PM_NONE
    227	bool "None"
    228
    229config CPU_PM_WAIT
    230	bool "wait"
    231
    232config CPU_PM_DOZE
    233	bool "doze"
    234
    235config CPU_PM_STOP
    236	bool "stop"
    237endchoice
    238
    239menuconfig HAVE_TCM
    240	bool "Tightly-Coupled/Sram Memory"
    241	depends on !COMPILE_TEST
    242	help
    243	  The implementation are not only used by TCM (Tightly-Coupled Meory)
    244	  but also used by sram on SOC bus. It follow existed linux tcm
    245	  software interface, so that old tcm application codes could be
    246	  re-used directly.
    247
    248if HAVE_TCM
    249config ITCM_RAM_BASE
    250	hex "ITCM ram base"
    251	default 0xffffffff
    252
    253config ITCM_NR_PAGES
    254	int "Page count of ITCM size: NR*4KB"
    255	range 1 256
    256	default 32
    257
    258config HAVE_DTCM
    259	bool "DTCM Support"
    260
    261config DTCM_RAM_BASE
    262	hex "DTCM ram base"
    263	depends on HAVE_DTCM
    264	default 0xffffffff
    265
    266config DTCM_NR_PAGES
    267	int "Page count of DTCM size: NR*4KB"
    268	depends on HAVE_DTCM
    269	range 1 256
    270	default 32
    271endif
    272
    273config CPU_HAS_VDSP
    274	bool "CPU has VDSP coprocessor"
    275	depends on CPU_HAS_FPU && CPU_HAS_FPUV2
    276
    277config CPU_HAS_FPU
    278	bool "CPU has FPU coprocessor"
    279	depends on CPU_CK807 || CPU_CK810 || CPU_CK860
    280
    281config CPU_HAS_ICACHE_INS
    282	bool "CPU has Icache invalidate instructions"
    283	depends on CPU_HAS_CACHEV2
    284
    285config CPU_HAS_TEE
    286	bool "CPU has Trusted Execution Environment"
    287	depends on CPU_CK810
    288
    289config SMP
    290	bool "Symmetric Multi-Processing (SMP) support for C-SKY"
    291	depends on CPU_CK860
    292	default n
    293
    294config NR_CPUS
    295	int "Maximum number of CPUs (2-32)"
    296	range 2 32
    297	depends on SMP
    298	default "4"
    299
    300config HIGHMEM
    301	bool "High Memory Support"
    302	depends on !CPU_CK610
    303	select KMAP_LOCAL
    304	default y
    305
    306config FORCE_MAX_ZONEORDER
    307	int "Maximum zone order"
    308	default "11"
    309
    310config DRAM_BASE
    311	hex "DRAM start addr (the same with memory-section in dts)"
    312	default 0x0
    313
    314config HOTPLUG_CPU
    315	bool "Support for hot-pluggable CPUs"
    316	select GENERIC_IRQ_MIGRATION
    317	depends on SMP
    318	help
    319	  Say Y here to allow turning CPUs off and on. CPUs can be
    320	  controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
    321
    322	  Say N if you want to disable CPU hotplug.
    323
    324config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
    325	bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
    326	depends on CPU_CK807 || CPU_CK810 || CPU_CK860
    327	help
    328	  Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
    329	  deal with unaligned access by hardware.
    330
    331endmenu
    332
    333source "arch/csky/Kconfig.platforms"
    334
    335source "kernel/Kconfig.hz"