cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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io.c (1699B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * I/O access functions for Hexagon
      4 *
      5 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
      6 */
      7
      8#include <asm/io.h>
      9
     10/*  These are all FIFO routines!  */
     11
     12/*
     13 * __raw_readsw - read words a short at a time
     14 * @addr:  source address
     15 * @data:  data address
     16 * @len: number of shorts to read
     17 */
     18void __raw_readsw(const void __iomem *addr, void *data, int len)
     19{
     20	const volatile short int *src = (short int *) addr;
     21	short int *dst = (short int *) data;
     22
     23	if ((u32)data & 0x1)
     24		panic("unaligned pointer to readsw");
     25
     26	while (len-- > 0)
     27		*dst++ = *src;
     28
     29}
     30EXPORT_SYMBOL(__raw_readsw);
     31
     32/*
     33 * __raw_writesw - read words a short at a time
     34 * @addr:  source address
     35 * @data:  data address
     36 * @len: number of shorts to read
     37 */
     38void __raw_writesw(void __iomem *addr, const void *data, int len)
     39{
     40	const short int *src = (short int *)data;
     41	volatile short int *dst = (short int *)addr;
     42
     43	if ((u32)data & 0x1)
     44		panic("unaligned pointer to writesw");
     45
     46	while (len-- > 0)
     47		*dst = *src++;
     48
     49
     50}
     51EXPORT_SYMBOL(__raw_writesw);
     52
     53/*  Pretty sure len is pre-adjusted for the length of the access already */
     54void __raw_readsl(const void __iomem *addr, void *data, int len)
     55{
     56	const volatile long *src = (long *) addr;
     57	long *dst = (long *) data;
     58
     59	if ((u32)data & 0x3)
     60		panic("unaligned pointer to readsl");
     61
     62	while (len-- > 0)
     63		*dst++ = *src;
     64
     65
     66}
     67EXPORT_SYMBOL(__raw_readsl);
     68
     69void __raw_writesl(void __iomem *addr, const void *data, int len)
     70{
     71	const long *src = (long *)data;
     72	volatile long *dst = (long *)addr;
     73
     74	if ((u32)data & 0x3)
     75		panic("unaligned pointer to writesl");
     76
     77	while (len-- > 0)
     78		*dst = *src++;
     79
     80
     81}
     82EXPORT_SYMBOL(__raw_writesl);