cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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switch_to.h (2702B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Low-level task switching. This is based on information published in
      4 * the Processor Abstraction Layer and the System Abstraction Layer
      5 * manual.
      6 *
      7 * Copyright (C) 1998-2003 Hewlett-Packard Co
      8 *	David Mosberger-Tang <davidm@hpl.hp.com>
      9 * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
     10 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
     11 */
     12#ifndef _ASM_IA64_SWITCH_TO_H
     13#define _ASM_IA64_SWITCH_TO_H
     14
     15#include <linux/percpu.h>
     16
     17struct task_struct;
     18
     19/*
     20 * Context switch from one thread to another.  If the two threads have
     21 * different address spaces, schedule() has already taken care of
     22 * switching to the new address space by calling switch_mm().
     23 *
     24 * Disabling access to the fph partition and the debug-register
     25 * context switch MUST be done before calling ia64_switch_to() since a
     26 * newly created thread returns directly to
     27 * ia64_ret_from_syscall_clear_r8.
     28 */
     29extern struct task_struct *ia64_switch_to (void *next_task);
     30
     31extern void ia64_save_extra (struct task_struct *task);
     32extern void ia64_load_extra (struct task_struct *task);
     33
     34#define IA64_HAS_EXTRA_STATE(t)							\
     35	((t)->thread.flags & (IA64_THREAD_DBG_VALID|IA64_THREAD_PM_VALID))
     36
     37#define __switch_to(prev,next,last) do {							 \
     38	if (IA64_HAS_EXTRA_STATE(prev))								 \
     39		ia64_save_extra(prev);								 \
     40	if (IA64_HAS_EXTRA_STATE(next))								 \
     41		ia64_load_extra(next);								 \
     42	ia64_psr(task_pt_regs(next))->dfh = !ia64_is_local_fpu_owner(next);			 \
     43	(last) = ia64_switch_to((next));							 \
     44} while (0)
     45
     46#ifdef CONFIG_SMP
     47/*
     48 * In the SMP case, we save the fph state when context-switching away from a thread that
     49 * modified fph.  This way, when the thread gets scheduled on another CPU, the CPU can
     50 * pick up the state from task->thread.fph, avoiding the complication of having to fetch
     51 * the latest fph state from another CPU.  In other words: eager save, lazy restore.
     52 */
     53# define switch_to(prev,next,last) do {						\
     54	if (ia64_psr(task_pt_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) {				\
     55		ia64_psr(task_pt_regs(prev))->mfh = 0;			\
     56		(prev)->thread.flags |= IA64_THREAD_FPH_VALID;			\
     57		__ia64_save_fpu((prev)->thread.fph);				\
     58	}									\
     59	__switch_to(prev, next, last);						\
     60	/* "next" in old context is "current" in new context */			\
     61	if (unlikely((current->thread.flags & IA64_THREAD_MIGRATION) &&	       \
     62		     (task_cpu(current) !=				       \
     63		      		      task_thread_info(current)->last_cpu))) { \
     64		task_thread_info(current)->last_cpu = task_cpu(current);       \
     65	}								       \
     66} while (0)
     67#else
     68# define switch_to(prev,next,last)	__switch_to(prev, next, last)
     69#endif
     70
     71#endif /* _ASM_IA64_SWITCH_TO_H */