cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tlb.h (1577B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _ASM_IA64_TLB_H
      3#define _ASM_IA64_TLB_H
      4/*
      5 * Based on <asm-generic/tlb.h>.
      6 *
      7 * Copyright (C) 2002-2003 Hewlett-Packard Co
      8 *	David Mosberger-Tang <davidm@hpl.hp.com>
      9 */
     10/*
     11 * Removing a translation from a page table (including TLB-shootdown) is a four-step
     12 * procedure:
     13 *
     14 *	(1) Flush (virtual) caches --- ensures virtual memory is coherent with kernel memory
     15 *	    (this is a no-op on ia64).
     16 *	(2) Clear the relevant portions of the page-table
     17 *	(3) Flush the TLBs --- ensures that stale content is gone from CPU TLBs
     18 *	(4) Release the pages that were freed up in step (2).
     19 *
     20 * Note that the ordering of these steps is crucial to avoid races on MP machines.
     21 *
     22 * The Linux kernel defines several platform-specific hooks for TLB-shootdown.  When
     23 * unmapping a portion of the virtual address space, these hooks are called according to
     24 * the following template:
     25 *
     26 *	tlb <- tlb_gather_mmu(mm);			// start unmap for address space MM
     27 *	{
     28 *	  for each vma that needs a shootdown do {
     29 *	    tlb_start_vma(tlb, vma);
     30 *	      for each page-table-entry PTE that needs to be removed do {
     31 *		tlb_remove_tlb_entry(tlb, pte, address);
     32 *		if (pte refers to a normal page) {
     33 *		  tlb_remove_page(tlb, page);
     34 *		}
     35 *	      }
     36 *	    tlb_end_vma(tlb, vma);
     37 *	  }
     38 *	}
     39 *	tlb_finish_mmu(tlb);				// finish unmap for address space MM
     40 */
     41#include <linux/mm.h>
     42#include <linux/pagemap.h>
     43#include <linux/swap.h>
     44
     45#include <asm/processor.h>
     46#include <asm/tlbflush.h>
     47
     48#include <asm-generic/tlb.h>
     49
     50#endif /* _ASM_IA64_TLB_H */