cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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efi_stub.S (2685B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * EFI call stub.
      4 *
      5 * Copyright (C) 1999-2001 Hewlett-Packard Co
      6 *	David Mosberger <davidm@hpl.hp.com>
      7 *
      8 * This stub allows us to make EFI calls in physical mode with interrupts
      9 * turned off.  We need this because we can't call SetVirtualMap() until
     10 * the kernel has booted far enough to allow allocation of struct vm_area_struct
     11 * entries (which we would need to map stuff with memory attributes other
     12 * than uncached or writeback...).  Since the GetTime() service gets called
     13 * earlier than that, we need to be able to make physical mode EFI calls from
     14 * the kernel.
     15 */
     16
     17/*
     18 * PSR settings as per SAL spec (Chapter 8 in the "IA-64 System
     19 * Abstraction Layer Specification", revision 2.6e).  Note that
     20 * psr.dfl and psr.dfh MUST be cleared, despite what this manual says.
     21 * Otherwise, SAL dies whenever it's trying to do an IA-32 BIOS call
     22 * (the br.ia instruction fails unless psr.dfl and psr.dfh are
     23 * cleared).  Fortunately, SAL promises not to touch the floating
     24 * point regs, so at least we don't have to save f2-f127.
     25 */
     26#define PSR_BITS_TO_CLEAR						\
     27	(IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_RT |		\
     28	 IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED |	\
     29	 IA64_PSR_DFL | IA64_PSR_DFH)
     30
     31#define PSR_BITS_TO_SET							\
     32	(IA64_PSR_BN)
     33
     34#include <asm/processor.h>
     35#include <asm/asmmacro.h>
     36
     37/*
     38 * Inputs:
     39 *	in0 = address of function descriptor of EFI routine to call
     40 *	in1..in7 = arguments to routine
     41 *
     42 * Outputs:
     43 *	r8 = EFI_STATUS returned by called function
     44 */
     45
     46GLOBAL_ENTRY(efi_call_phys)
     47	.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
     48	alloc loc1=ar.pfs,8,7,7,0
     49	ld8 r2=[in0],8			// load EFI function's entry point
     50	mov loc0=rp
     51	.body
     52	;;
     53	mov loc2=gp			// save global pointer
     54	mov loc4=ar.rsc			// save RSE configuration
     55	mov ar.rsc=0			// put RSE in enforced lazy, LE mode
     56	;;
     57	ld8 gp=[in0]			// load EFI function's global pointer
     58	movl r16=PSR_BITS_TO_CLEAR
     59	mov loc3=psr			// save processor status word
     60	movl r17=PSR_BITS_TO_SET
     61	;;
     62	or loc3=loc3,r17
     63	mov b6=r2
     64	;;
     65	andcm r16=loc3,r16	// get psr with IT, DT, and RT bits cleared
     66	br.call.sptk.many rp=ia64_switch_mode_phys
     67.ret0:	mov out4=in5
     68	mov out0=in1
     69	mov out1=in2
     70	mov out2=in3
     71	mov out3=in4
     72	mov out5=in6
     73	mov out6=in7
     74	mov loc5=r19
     75	mov loc6=r20
     76	br.call.sptk.many rp=b6		// call the EFI function
     77.ret1:	mov ar.rsc=0			// put RSE in enforced lazy, LE mode
     78	mov r16=loc3
     79	mov r19=loc5
     80	mov r20=loc6
     81	br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
     82.ret2:	mov ar.rsc=loc4			// restore RSE configuration
     83	mov ar.pfs=loc1
     84	mov rp=loc0
     85	mov gp=loc2
     86	br.ret.sptk.many rp
     87END(efi_call_phys)