cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cpu-features.h (2838B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
      4 *
      5 * Derived from MIPS:
      6 * Copyright (C) 2003, 2004 Ralf Baechle
      7 * Copyright (C) 2004  Maciej W. Rozycki
      8 */
      9#ifndef __ASM_CPU_FEATURES_H
     10#define __ASM_CPU_FEATURES_H
     11
     12#include <asm/cpu.h>
     13#include <asm/cpu-info.h>
     14
     15#define cpu_opt(opt)			(cpu_data[0].options & (opt))
     16#define cpu_has(feat)			(cpu_data[0].options & BIT_ULL(feat))
     17
     18#define cpu_has_loongarch		(cpu_has_loongarch32 | cpu_has_loongarch64)
     19#define cpu_has_loongarch32		(cpu_data[0].isa_level & LOONGARCH_CPU_ISA_32BIT)
     20#define cpu_has_loongarch64		(cpu_data[0].isa_level & LOONGARCH_CPU_ISA_64BIT)
     21
     22#define cpu_icache_line_size()		cpu_data[0].icache.linesz
     23#define cpu_dcache_line_size()		cpu_data[0].dcache.linesz
     24#define cpu_vcache_line_size()		cpu_data[0].vcache.linesz
     25#define cpu_scache_line_size()		cpu_data[0].scache.linesz
     26
     27#ifdef CONFIG_32BIT
     28# define cpu_has_64bits			(cpu_data[0].isa_level & LOONGARCH_CPU_ISA_64BIT)
     29# define cpu_vabits			31
     30# define cpu_pabits			31
     31#endif
     32
     33#ifdef CONFIG_64BIT
     34# define cpu_has_64bits			1
     35# define cpu_vabits			cpu_data[0].vabits
     36# define cpu_pabits			cpu_data[0].pabits
     37# define __NEED_ADDRBITS_PROBE
     38#endif
     39
     40/*
     41 * SMP assumption: Options of CPU 0 are a superset of all processors.
     42 * This is true for all known LoongArch systems.
     43 */
     44#define cpu_has_cpucfg		cpu_opt(LOONGARCH_CPU_CPUCFG)
     45#define cpu_has_lam		cpu_opt(LOONGARCH_CPU_LAM)
     46#define cpu_has_ual		cpu_opt(LOONGARCH_CPU_UAL)
     47#define cpu_has_fpu		cpu_opt(LOONGARCH_CPU_FPU)
     48#define cpu_has_lsx		cpu_opt(LOONGARCH_CPU_LSX)
     49#define cpu_has_lasx		cpu_opt(LOONGARCH_CPU_LASX)
     50#define cpu_has_complex		cpu_opt(LOONGARCH_CPU_COMPLEX)
     51#define cpu_has_crypto		cpu_opt(LOONGARCH_CPU_CRYPTO)
     52#define cpu_has_lvz		cpu_opt(LOONGARCH_CPU_LVZ)
     53#define cpu_has_lbt_x86		cpu_opt(LOONGARCH_CPU_LBT_X86)
     54#define cpu_has_lbt_arm		cpu_opt(LOONGARCH_CPU_LBT_ARM)
     55#define cpu_has_lbt_mips	cpu_opt(LOONGARCH_CPU_LBT_MIPS)
     56#define cpu_has_lbt		(cpu_has_lbt_x86|cpu_has_lbt_arm|cpu_has_lbt_mips)
     57#define cpu_has_csr		cpu_opt(LOONGARCH_CPU_CSR)
     58#define cpu_has_tlb		cpu_opt(LOONGARCH_CPU_TLB)
     59#define cpu_has_watch		cpu_opt(LOONGARCH_CPU_WATCH)
     60#define cpu_has_vint		cpu_opt(LOONGARCH_CPU_VINT)
     61#define cpu_has_csripi		cpu_opt(LOONGARCH_CPU_CSRIPI)
     62#define cpu_has_extioi		cpu_opt(LOONGARCH_CPU_EXTIOI)
     63#define cpu_has_prefetch	cpu_opt(LOONGARCH_CPU_PREFETCH)
     64#define cpu_has_pmp		cpu_opt(LOONGARCH_CPU_PMP)
     65#define cpu_has_perf		cpu_opt(LOONGARCH_CPU_PMP)
     66#define cpu_has_scalefreq	cpu_opt(LOONGARCH_CPU_SCALEFREQ)
     67#define cpu_has_flatmode	cpu_opt(LOONGARCH_CPU_FLATMODE)
     68#define cpu_has_eiodecode	cpu_opt(LOONGARCH_CPU_EIODECODE)
     69#define cpu_has_guestid		cpu_opt(LOONGARCH_CPU_GUESTID)
     70#define cpu_has_hypervisor	cpu_opt(LOONGARCH_CPU_HYPERVISOR)
     71
     72
     73#endif /* __ASM_CPU_FEATURES_H */