fpregdef.h (1090B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Definitions for the FPU register names 4 * 5 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 6 */ 7#ifndef _ASM_FPREGDEF_H 8#define _ASM_FPREGDEF_H 9 10#define fa0 $f0 /* argument registers, fa0/fa1 reused as fv0/fv1 for return value */ 11#define fa1 $f1 12#define fa2 $f2 13#define fa3 $f3 14#define fa4 $f4 15#define fa5 $f5 16#define fa6 $f6 17#define fa7 $f7 18#define ft0 $f8 /* caller saved */ 19#define ft1 $f9 20#define ft2 $f10 21#define ft3 $f11 22#define ft4 $f12 23#define ft5 $f13 24#define ft6 $f14 25#define ft7 $f15 26#define ft8 $f16 27#define ft9 $f17 28#define ft10 $f18 29#define ft11 $f19 30#define ft12 $f20 31#define ft13 $f21 32#define ft14 $f22 33#define ft15 $f23 34#define fs0 $f24 /* callee saved */ 35#define fs1 $f25 36#define fs2 $f26 37#define fs3 $f27 38#define fs4 $f28 39#define fs5 $f29 40#define fs6 $f30 41#define fs7 $f31 42 43/* 44 * Current binutils expects *GPRs* at FCSR position for the FCSR 45 * operation instructions, so define aliases for those used. 46 */ 47#define fcsr0 $r0 48#define fcsr1 $r1 49#define fcsr2 $r2 50#define fcsr3 $r3 51 52#endif /* _ASM_FPREGDEF_H */