cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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irq.h (4177B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
      4 */
      5#ifndef _ASM_IRQ_H
      6#define _ASM_IRQ_H
      7
      8#include <linux/irqdomain.h>
      9#include <linux/irqreturn.h>
     10
     11#define IRQ_STACK_SIZE			THREAD_SIZE
     12#define IRQ_STACK_START			(IRQ_STACK_SIZE - 16)
     13
     14DECLARE_PER_CPU(unsigned long, irq_stack);
     15
     16/*
     17 * The highest address on the IRQ stack contains a dummy frame which is
     18 * structured as follows:
     19 *
     20 *   top ------------
     21 *       | task sp  | <- irq_stack[cpu] + IRQ_STACK_START
     22 *       ------------
     23 *       |          | <- First frame of IRQ context
     24 *       ------------
     25 *
     26 * task sp holds a copy of the task stack pointer where the struct pt_regs
     27 * from exception entry can be found.
     28 */
     29
     30static inline bool on_irq_stack(int cpu, unsigned long sp)
     31{
     32	unsigned long low = per_cpu(irq_stack, cpu);
     33	unsigned long high = low + IRQ_STACK_SIZE;
     34
     35	return (low <= sp && sp <= high);
     36}
     37
     38int get_ipi_irq(void);
     39int get_pmc_irq(void);
     40int get_timer_irq(void);
     41void spurious_interrupt(void);
     42
     43#define NR_IRQS_LEGACY 16
     44
     45#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
     46void arch_trigger_cpumask_backtrace(const struct cpumask *mask, bool exclude_self);
     47
     48#define MAX_IO_PICS 2
     49#define NR_IRQS	(64 + (256 * MAX_IO_PICS))
     50
     51#define CORES_PER_EIO_NODE	4
     52
     53#define LOONGSON_CPU_UART0_VEC		10 /* CPU UART0 */
     54#define LOONGSON_CPU_THSENS_VEC		14 /* CPU Thsens */
     55#define LOONGSON_CPU_HT0_VEC		16 /* CPU HT0 irq vector base number */
     56#define LOONGSON_CPU_HT1_VEC		24 /* CPU HT1 irq vector base number */
     57
     58/* IRQ number definitions */
     59#define LOONGSON_LPC_IRQ_BASE		0
     60#define LOONGSON_LPC_LAST_IRQ		(LOONGSON_LPC_IRQ_BASE + 15)
     61
     62#define LOONGSON_CPU_IRQ_BASE		16
     63#define LOONGSON_CPU_LAST_IRQ		(LOONGSON_CPU_IRQ_BASE + 14)
     64
     65#define LOONGSON_PCH_IRQ_BASE		64
     66#define LOONGSON_PCH_ACPI_IRQ		(LOONGSON_PCH_IRQ_BASE + 47)
     67#define LOONGSON_PCH_LAST_IRQ		(LOONGSON_PCH_IRQ_BASE + 64 - 1)
     68
     69#define LOONGSON_MSI_IRQ_BASE		(LOONGSON_PCH_IRQ_BASE + 64)
     70#define LOONGSON_MSI_LAST_IRQ		(LOONGSON_PCH_IRQ_BASE + 256 - 1)
     71
     72#define GSI_MIN_LPC_IRQ		LOONGSON_LPC_IRQ_BASE
     73#define GSI_MAX_LPC_IRQ		(LOONGSON_LPC_IRQ_BASE + 16 - 1)
     74#define GSI_MIN_CPU_IRQ		LOONGSON_CPU_IRQ_BASE
     75#define GSI_MAX_CPU_IRQ		(LOONGSON_CPU_IRQ_BASE + 48 - 1)
     76#define GSI_MIN_PCH_IRQ		LOONGSON_PCH_IRQ_BASE
     77#define GSI_MAX_PCH_IRQ		(LOONGSON_PCH_IRQ_BASE + 256 - 1)
     78
     79extern int find_pch_pic(u32 gsi);
     80extern int eiointc_get_node(int id);
     81
     82static inline void eiointc_enable(void)
     83{
     84	uint64_t misc;
     85
     86	misc = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC);
     87	misc |= IOCSR_MISC_FUNC_EXT_IOI_EN;
     88	iocsr_write64(misc, LOONGARCH_IOCSR_MISC_FUNC);
     89}
     90
     91struct acpi_madt_lio_pic;
     92struct acpi_madt_eio_pic;
     93struct acpi_madt_ht_pic;
     94struct acpi_madt_bio_pic;
     95struct acpi_madt_msi_pic;
     96struct acpi_madt_lpc_pic;
     97
     98struct irq_domain *loongarch_cpu_irq_init(void);
     99
    100struct irq_domain *liointc_acpi_init(struct irq_domain *parent,
    101					struct acpi_madt_lio_pic *acpi_liointc);
    102struct irq_domain *eiointc_acpi_init(struct irq_domain *parent,
    103					struct acpi_madt_eio_pic *acpi_eiointc);
    104
    105struct irq_domain *htvec_acpi_init(struct irq_domain *parent,
    106					struct acpi_madt_ht_pic *acpi_htvec);
    107struct irq_domain *pch_lpc_acpi_init(struct irq_domain *parent,
    108					struct acpi_madt_lpc_pic *acpi_pchlpc);
    109struct irq_domain *pch_msi_acpi_init(struct irq_domain *parent,
    110					struct acpi_madt_msi_pic *acpi_pchmsi);
    111struct irq_domain *pch_pic_acpi_init(struct irq_domain *parent,
    112					struct acpi_madt_bio_pic *acpi_pchpic);
    113
    114extern struct acpi_madt_lio_pic *acpi_liointc;
    115extern struct acpi_madt_eio_pic *acpi_eiointc[MAX_IO_PICS];
    116
    117extern struct acpi_madt_ht_pic *acpi_htintc;
    118extern struct acpi_madt_lpc_pic *acpi_pchlpc;
    119extern struct acpi_madt_msi_pic *acpi_pchmsi[MAX_IO_PICS];
    120extern struct acpi_madt_bio_pic *acpi_pchpic[MAX_IO_PICS];
    121
    122extern struct irq_domain *cpu_domain;
    123extern struct irq_domain *liointc_domain;
    124extern struct irq_domain *pch_lpc_domain;
    125extern struct irq_domain *pch_msi_domain[MAX_IO_PICS];
    126extern struct irq_domain *pch_pic_domain[MAX_IO_PICS];
    127
    128extern irqreturn_t loongson3_ipi_interrupt(int irq, void *dev);
    129
    130#include <asm-generic/irq.h>
    131
    132#endif /* _ASM_IRQ_H */