cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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config.c (5942B)


      1// SPDX-License-Identifier: GPL-2.0
      2#include <linux/init.h>
      3#include <linux/types.h>
      4#include <linux/kernel.h>
      5#include <linux/mm.h>
      6#include <linux/tty.h>
      7#include <linux/console.h>
      8#include <linux/rtc.h>
      9#include <linux/vt_kern.h>
     10#include <linux/interrupt.h>
     11
     12#include <asm/setup.h>
     13#include <asm/bootinfo.h>
     14#include <asm/bootinfo-apollo.h>
     15#include <asm/byteorder.h>
     16#include <asm/apollohw.h>
     17#include <asm/irq.h>
     18#include <asm/machdep.h>
     19#include <asm/config.h>
     20
     21u_long sio01_physaddr;
     22u_long sio23_physaddr;
     23u_long rtc_physaddr;
     24u_long pica_physaddr;
     25u_long picb_physaddr;
     26u_long cpuctrl_physaddr;
     27u_long timer_physaddr;
     28u_long apollo_model;
     29
     30extern void dn_sched_init(void);
     31extern void dn_init_IRQ(void);
     32extern int dn_dummy_hwclk(int, struct rtc_time *);
     33extern void dn_dummy_reset(void);
     34#ifdef CONFIG_HEARTBEAT
     35static void dn_heartbeat(int on);
     36#endif
     37static irqreturn_t dn_timer_int(int irq,void *);
     38static void dn_get_model(char *model);
     39static const char *apollo_models[] = {
     40	[APOLLO_DN3000-APOLLO_DN3000] = "DN3000 (Otter)",
     41	[APOLLO_DN3010-APOLLO_DN3000] = "DN3010 (Otter)",
     42	[APOLLO_DN3500-APOLLO_DN3000] = "DN3500 (Cougar II)",
     43	[APOLLO_DN4000-APOLLO_DN3000] = "DN4000 (Mink)",
     44	[APOLLO_DN4500-APOLLO_DN3000] = "DN4500 (Roadrunner)"
     45};
     46
     47int __init apollo_parse_bootinfo(const struct bi_record *record)
     48{
     49	int unknown = 0;
     50	const void *data = record->data;
     51
     52	switch (be16_to_cpu(record->tag)) {
     53	case BI_APOLLO_MODEL:
     54		apollo_model = be32_to_cpup(data);
     55		break;
     56
     57	default:
     58		 unknown=1;
     59	}
     60
     61	return unknown;
     62}
     63
     64static void __init dn_setup_model(void)
     65{
     66	pr_info("Apollo hardware found: [%s]\n",
     67		apollo_models[apollo_model - APOLLO_DN3000]);
     68
     69	switch(apollo_model) {
     70		case APOLLO_UNKNOWN:
     71			panic("Unknown apollo model");
     72			break;
     73		case APOLLO_DN3000:
     74		case APOLLO_DN3010:
     75			sio01_physaddr=SAU8_SIO01_PHYSADDR;
     76			rtc_physaddr=SAU8_RTC_PHYSADDR;
     77			pica_physaddr=SAU8_PICA;
     78			picb_physaddr=SAU8_PICB;
     79			cpuctrl_physaddr=SAU8_CPUCTRL;
     80			timer_physaddr=SAU8_TIMER;
     81			break;
     82		case APOLLO_DN4000:
     83			sio01_physaddr=SAU7_SIO01_PHYSADDR;
     84			sio23_physaddr=SAU7_SIO23_PHYSADDR;
     85			rtc_physaddr=SAU7_RTC_PHYSADDR;
     86			pica_physaddr=SAU7_PICA;
     87			picb_physaddr=SAU7_PICB;
     88			cpuctrl_physaddr=SAU7_CPUCTRL;
     89			timer_physaddr=SAU7_TIMER;
     90			break;
     91		case APOLLO_DN4500:
     92			panic("Apollo model not yet supported");
     93			break;
     94		case APOLLO_DN3500:
     95			sio01_physaddr=SAU7_SIO01_PHYSADDR;
     96			sio23_physaddr=SAU7_SIO23_PHYSADDR;
     97			rtc_physaddr=SAU7_RTC_PHYSADDR;
     98			pica_physaddr=SAU7_PICA;
     99			picb_physaddr=SAU7_PICB;
    100			cpuctrl_physaddr=SAU7_CPUCTRL;
    101			timer_physaddr=SAU7_TIMER;
    102			break;
    103		default:
    104			panic("Undefined apollo model");
    105			break;
    106	}
    107
    108
    109}
    110
    111int dn_serial_console_wait_key(struct console *co) {
    112
    113	while(!(sio01.srb_csrb & 1))
    114		barrier();
    115	return sio01.rhrb_thrb;
    116}
    117
    118void dn_serial_console_write (struct console *co, const char *str,unsigned int count)
    119{
    120   while(count--) {
    121	if (*str == '\n') {
    122	sio01.rhrb_thrb = (unsigned char)'\r';
    123	while (!(sio01.srb_csrb & 0x4))
    124                ;
    125	}
    126    sio01.rhrb_thrb = (unsigned char)*str++;
    127    while (!(sio01.srb_csrb & 0x4))
    128            ;
    129  }
    130}
    131
    132void dn_serial_print (const char *str)
    133{
    134    while (*str) {
    135        if (*str == '\n') {
    136            sio01.rhrb_thrb = (unsigned char)'\r';
    137            while (!(sio01.srb_csrb & 0x4))
    138                ;
    139        }
    140        sio01.rhrb_thrb = (unsigned char)*str++;
    141        while (!(sio01.srb_csrb & 0x4))
    142            ;
    143    }
    144}
    145
    146void __init config_apollo(void)
    147{
    148	int i;
    149
    150	dn_setup_model();
    151
    152	mach_sched_init=dn_sched_init; /* */
    153	mach_init_IRQ=dn_init_IRQ;
    154	mach_hwclk           = dn_dummy_hwclk; /* */
    155	mach_reset	     = dn_dummy_reset;  /* */
    156#ifdef CONFIG_HEARTBEAT
    157	mach_heartbeat = dn_heartbeat;
    158#endif
    159	mach_get_model       = dn_get_model;
    160
    161	cpuctrl=0xaa00;
    162
    163	/* clear DMA translation table */
    164	for(i=0;i<0x400;i++)
    165		addr_xlat_map[i]=0;
    166
    167}
    168
    169irqreturn_t dn_timer_int(int irq, void *dev_id)
    170{
    171	volatile unsigned char x;
    172
    173	legacy_timer_tick(1);
    174	timer_heartbeat();
    175
    176	x = *(volatile unsigned char *)(apollo_timer + 3);
    177	x = *(volatile unsigned char *)(apollo_timer + 5);
    178
    179	return IRQ_HANDLED;
    180}
    181
    182void dn_sched_init(void)
    183{
    184	/* program timer 1 */
    185	*(volatile unsigned char *)(apollo_timer + 3) = 0x01;
    186	*(volatile unsigned char *)(apollo_timer + 1) = 0x40;
    187	*(volatile unsigned char *)(apollo_timer + 5) = 0x09;
    188	*(volatile unsigned char *)(apollo_timer + 7) = 0xc4;
    189
    190	/* enable IRQ of PIC B */
    191	*(volatile unsigned char *)(pica+1)&=(~8);
    192
    193#if 0
    194	pr_info("*(0x10803) %02x\n",
    195		*(volatile unsigned char *)(apollo_timer + 0x3));
    196	pr_info("*(0x10803) %02x\n",
    197		*(volatile unsigned char *)(apollo_timer + 0x3));
    198#endif
    199
    200	if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", NULL))
    201		pr_err("Couldn't register timer interrupt\n");
    202}
    203
    204int dn_dummy_hwclk(int op, struct rtc_time *t) {
    205
    206
    207  if(!op) { /* read */
    208    t->tm_sec=rtc->second;
    209    t->tm_min=rtc->minute;
    210    t->tm_hour=rtc->hours;
    211    t->tm_mday=rtc->day_of_month;
    212    t->tm_wday=rtc->day_of_week;
    213    t->tm_mon = rtc->month - 1;
    214    t->tm_year=rtc->year;
    215    if (t->tm_year < 70)
    216	t->tm_year += 100;
    217  } else {
    218    rtc->second=t->tm_sec;
    219    rtc->minute=t->tm_min;
    220    rtc->hours=t->tm_hour;
    221    rtc->day_of_month=t->tm_mday;
    222    if(t->tm_wday!=-1)
    223      rtc->day_of_week=t->tm_wday;
    224    rtc->month = t->tm_mon + 1;
    225    rtc->year = t->tm_year % 100;
    226  }
    227
    228  return 0;
    229
    230}
    231
    232void dn_dummy_reset(void) {
    233
    234  dn_serial_print("The end !\n");
    235
    236  for(;;);
    237
    238}
    239
    240void dn_dummy_waitbut(void) {
    241
    242  dn_serial_print("waitbut\n");
    243
    244}
    245
    246static void dn_get_model(char *model)
    247{
    248    strcpy(model, "Apollo ");
    249    if (apollo_model >= APOLLO_DN3000 && apollo_model <= APOLLO_DN4500)
    250        strcat(model, apollo_models[apollo_model - APOLLO_DN3000]);
    251}
    252
    253#ifdef CONFIG_HEARTBEAT
    254static int dn_cpuctrl=0xff00;
    255
    256static void dn_heartbeat(int on) {
    257
    258	if(on) {
    259		dn_cpuctrl&=~0x100;
    260		cpuctrl=dn_cpuctrl;
    261	}
    262	else {
    263		dn_cpuctrl&=~0x100;
    264		dn_cpuctrl|=0x100;
    265		cpuctrl=dn_cpuctrl;
    266	}
    267}
    268#endif
    269