cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sto_res.S (1974B)


      1|
      2|	sto_res.sa 3.1 12/10/90
      3|
      4|	Takes the result and puts it in where the user expects it.
      5|	Library functions return result in fp0.	If fp0 is not the
      6|	users destination register then fp0 is moved to the
      7|	correct floating-point destination register.  fp0 and fp1
      8|	are then restored to the original contents.
      9|
     10|	Input:	result in fp0,fp1
     11|
     12|		d2 & a0 should be kept unmodified
     13|
     14|	Output:	moves the result to the true destination reg or mem
     15|
     16|	Modifies: destination floating point register
     17|
     18
     19|		Copyright (C) Motorola, Inc. 1990
     20|			All Rights Reserved
     21|
     22|       For details on the license for this file, please see the
     23|       file, README, in this same directory.
     24
     25STO_RES:	|idnt	2,1 | Motorola 040 Floating Point Software Package
     26
     27
     28	|section	8
     29
     30#include "fpsp.h"
     31
     32	.global	sto_cos
     33sto_cos:
     34	bfextu		CMDREG1B(%a6){#13:#3},%d0	|extract cos destination
     35	cmpib		#3,%d0		|check for fp0/fp1 cases
     36	bles		c_fp0123
     37	fmovemx	%fp1-%fp1,-(%a7)
     38	moveql		#7,%d1
     39	subl		%d0,%d1		|d1 = 7- (dest. reg. no.)
     40	clrl		%d0
     41	bsetl		%d1,%d0		|d0 is dynamic register mask
     42	fmovemx	(%a7)+,%d0
     43	rts
     44c_fp0123:
     45	cmpib		#0,%d0
     46	beqs		c_is_fp0
     47	cmpib		#1,%d0
     48	beqs		c_is_fp1
     49	cmpib		#2,%d0
     50	beqs		c_is_fp2
     51c_is_fp3:
     52	fmovemx	%fp1-%fp1,USER_FP3(%a6)
     53	rts
     54c_is_fp2:
     55	fmovemx	%fp1-%fp1,USER_FP2(%a6)
     56	rts
     57c_is_fp1:
     58	fmovemx	%fp1-%fp1,USER_FP1(%a6)
     59	rts
     60c_is_fp0:
     61	fmovemx	%fp1-%fp1,USER_FP0(%a6)
     62	rts
     63
     64
     65	.global	sto_res
     66sto_res:
     67	bfextu		CMDREG1B(%a6){#6:#3},%d0	|extract destination register
     68	cmpib		#3,%d0		|check for fp0/fp1 cases
     69	bles		fp0123
     70	fmovemx	%fp0-%fp0,-(%a7)
     71	moveql		#7,%d1
     72	subl		%d0,%d1		|d1 = 7- (dest. reg. no.)
     73	clrl		%d0
     74	bsetl		%d1,%d0		|d0 is dynamic register mask
     75	fmovemx	(%a7)+,%d0
     76	rts
     77fp0123:
     78	cmpib		#0,%d0
     79	beqs		is_fp0
     80	cmpib		#1,%d0
     81	beqs		is_fp1
     82	cmpib		#2,%d0
     83	beqs		is_fp2
     84is_fp3:
     85	fmovemx	%fp0-%fp0,USER_FP3(%a6)
     86	rts
     87is_fp2:
     88	fmovemx	%fp0-%fp0,USER_FP2(%a6)
     89	rts
     90is_fp1:
     91	fmovemx	%fp0-%fp0,USER_FP1(%a6)
     92	rts
     93is_fp0:
     94	fmovemx	%fp0-%fp0,USER_FP0(%a6)
     95	rts
     96
     97	|end