cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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apollohw.h (2410B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* apollohw.h : some structures to access apollo HW */
      3
      4#ifndef _ASMm68k_APOLLOHW_H_
      5#define _ASMm68k_APOLLOHW_H_
      6
      7#include <linux/types.h>
      8
      9#include <asm/bootinfo-apollo.h>
     10
     11
     12extern u_long apollo_model;
     13
     14
     15/*
     16   see scn2681 data sheet for more info.
     17   member names are read_write.
     18*/
     19
     20#define DECLARE_2681_FIELD(x) unsigned char x; unsigned char dummy##x
     21
     22struct SCN2681 {
     23
     24	DECLARE_2681_FIELD(mra);
     25	DECLARE_2681_FIELD(sra_csra);
     26	DECLARE_2681_FIELD(BRGtest_cra);
     27	DECLARE_2681_FIELD(rhra_thra);
     28	DECLARE_2681_FIELD(ipcr_acr);
     29	DECLARE_2681_FIELD(isr_imr);
     30	DECLARE_2681_FIELD(ctu_ctur);
     31	DECLARE_2681_FIELD(ctl_ctlr);
     32	DECLARE_2681_FIELD(mrb);
     33	DECLARE_2681_FIELD(srb_csrb);
     34	DECLARE_2681_FIELD(tst_crb);
     35	DECLARE_2681_FIELD(rhrb_thrb);
     36	DECLARE_2681_FIELD(reserved);
     37	DECLARE_2681_FIELD(ip_opcr);
     38	DECLARE_2681_FIELD(startCnt_setOutBit);
     39	DECLARE_2681_FIELD(stopCnt_resetOutBit);
     40
     41};
     42
     43struct mc146818 {
     44        unsigned char second, alarm_second;
     45        unsigned char minute, alarm_minute;
     46        unsigned char hours, alarm_hours;
     47        unsigned char day_of_week, day_of_month;
     48        unsigned char month, year;
     49};
     50
     51
     52#define IO_BASE 0x80000000
     53
     54extern u_long sio01_physaddr;
     55extern u_long sio23_physaddr;
     56extern u_long rtc_physaddr;
     57extern u_long pica_physaddr;
     58extern u_long picb_physaddr;
     59extern u_long cpuctrl_physaddr;
     60extern u_long timer_physaddr;
     61
     62#define SAU7_SIO01_PHYSADDR 0x10400
     63#define SAU7_SIO23_PHYSADDR 0x10500
     64#define SAU7_RTC_PHYSADDR 0x10900
     65#define SAU7_PICA 0x11000
     66#define SAU7_PICB 0x11100
     67#define SAU7_CPUCTRL 0x10100
     68#define SAU7_TIMER 0x010800
     69
     70#define SAU8_SIO01_PHYSADDR 0x8400
     71#define SAU8_RTC_PHYSADDR 0x8900
     72#define SAU8_PICA 0x9400
     73#define SAU8_PICB 0x9500
     74#define SAU8_CPUCTRL 0x8100
     75#define SAU8_TIMER 0x8800
     76
     77#define sio01 ((*(volatile struct SCN2681 *)(IO_BASE + sio01_physaddr)))
     78#define sio23 ((*(volatile struct SCN2681 *)(IO_BASE + sio23_physaddr)))
     79#define rtc (((volatile struct mc146818 *)(IO_BASE + rtc_physaddr)))
     80#define cpuctrl (*(volatile unsigned int *)(IO_BASE + cpuctrl_physaddr))
     81#define pica (IO_BASE + pica_physaddr)
     82#define picb (IO_BASE + picb_physaddr)
     83#define apollo_timer (IO_BASE + timer_physaddr)
     84#define addr_xlat_map ((unsigned short *)(IO_BASE + 0x17000))
     85
     86#define isaIO2mem(x) (((((x) & 0x3f8)  << 7) | (((x) & 0xfc00) >> 6) | ((x) & 0x7)) + 0x40000 + IO_BASE)
     87
     88#define IRQ_APOLLO	IRQ_USER
     89
     90#endif