cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

hash.h (2115B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _ASM_HASH_H
      3#define _ASM_HASH_H
      4
      5/*
      6 * If CONFIG_M68000=y (original mc68000/010), this file is #included
      7 * to work around the lack of a MULU.L instruction.
      8 */
      9
     10#define HAVE_ARCH__HASH_32 1
     11/*
     12 * While it would be legal to substitute a different hash operation
     13 * entirely, let's keep it simple and just use an optimized multiply
     14 * by GOLDEN_RATIO_32 = 0x61C88647.
     15 *
     16 * The best way to do that appears to be to multiply by 0x8647 with
     17 * shifts and adds, and use mulu.w to multiply the high half by 0x61C8.
     18 *
     19 * Because the 68000 has multi-cycle shifts, this addition chain is
     20 * chosen to minimise the shift distances.
     21 *
     22 * Despite every attempt to spoon-feed it simple operations, GCC
     23 * 6.1.1 doggedly insists on doing annoying things like converting
     24 * "lsl.l #2,<reg>" (12 cycles) to two adds (8+8 cycles).
     25 *
     26 * It also likes to notice two shifts in a row, like "a = x << 2" and
     27 * "a <<= 7", and convert that to "a = x << 9".  But shifts longer
     28 * than 8 bits are extra-slow on m68k, so that's a lose.
     29 *
     30 * Since the 68000 is a very simple in-order processor with no
     31 * instruction scheduling effects on execution time, we can safely
     32 * take it out of GCC's hands and write one big asm() block.
     33 *
     34 * Without calling overhead, this operation is 30 bytes (14 instructions
     35 * plus one immediate constant) and 166 cycles.
     36 *
     37 * (Because %2 is fetched twice, it can't be postincrement, and thus it
     38 * can't be a fully general "g" or "m".  Register is preferred, but
     39 * offsettable memory or immediate will work.)
     40 */
     41static inline u32 __attribute_const__ __hash_32(u32 x)
     42{
     43	u32 a, b;
     44
     45	asm(   "move.l %2,%0"	/* a = x * 0x0001 */
     46	"\n	lsl.l #2,%0"	/* a = x * 0x0004 */
     47	"\n	move.l %0,%1"
     48	"\n	lsl.l #7,%0"	/* a = x * 0x0200 */
     49	"\n	add.l %2,%0"	/* a = x * 0x0201 */
     50	"\n	add.l %0,%1"	/* b = x * 0x0205 */
     51	"\n	add.l %0,%0"	/* a = x * 0x0402 */
     52	"\n	add.l %0,%1"	/* b = x * 0x0607 */
     53	"\n	lsl.l #5,%0"	/* a = x * 0x8040 */
     54	: "=&d,d" (a), "=&r,r" (b)
     55	: "r,roi?" (x));	/* a+b = x*0x8647 */
     56
     57	return ((u16)(x*0x61c8) << 16) + a + b;
     58}
     59
     60#endif	/* _ASM_HASH_H */