cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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irq.h (2666B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _M68K_IRQ_H_
      3#define _M68K_IRQ_H_
      4
      5/*
      6 * This should be the same as the max(NUM_X_SOURCES) for all the
      7 * different m68k hosts compiled into the kernel.
      8 * Currently the Atari has 72 and the Amiga 24, but if both are
      9 * supported in the kernel it is better to make room for 72.
     10 * With EtherNAT add-on card on Atari, the highest interrupt
     11 * number is 140 so NR_IRQS needs to be 141.
     12 */
     13#if defined(CONFIG_COLDFIRE)
     14#define NR_IRQS 256
     15#elif defined(CONFIG_VME) || defined(CONFIG_SUN3) || \
     16      defined(CONFIG_SUN3X) || defined(CONFIG_VIRT)
     17#define NR_IRQS 200
     18#elif defined(CONFIG_ATARI)
     19#define NR_IRQS 141
     20#elif defined(CONFIG_MAC)
     21#define NR_IRQS 72
     22#elif defined(CONFIG_Q40)
     23#define NR_IRQS	43
     24#elif defined(CONFIG_AMIGA) || !defined(CONFIG_MMU)
     25#define NR_IRQS	32
     26#elif defined(CONFIG_APOLLO)
     27#define NR_IRQS	24
     28#elif defined(CONFIG_HP300)
     29#define NR_IRQS	8
     30#else
     31#define NR_IRQS	0
     32#endif
     33
     34#if defined(CONFIG_M68020) || defined(CONFIG_M68030) || \
     35    defined(CONFIG_M68040) || defined(CONFIG_M68060)
     36
     37/*
     38 * Interrupt source definitions
     39 * General interrupt sources are the level 1-7.
     40 * Adding an interrupt service routine for one of these sources
     41 * results in the addition of that routine to a chain of routines.
     42 * Each one is called in succession.  Each individual interrupt
     43 * service routine should determine if the device associated with
     44 * that routine requires service.
     45 */
     46
     47#define IRQ_SPURIOUS	0
     48
     49#define IRQ_AUTO_1	1	/* level 1 interrupt */
     50#define IRQ_AUTO_2	2	/* level 2 interrupt */
     51#define IRQ_AUTO_3	3	/* level 3 interrupt */
     52#define IRQ_AUTO_4	4	/* level 4 interrupt */
     53#define IRQ_AUTO_5	5	/* level 5 interrupt */
     54#define IRQ_AUTO_6	6	/* level 6 interrupt */
     55#define IRQ_AUTO_7	7	/* level 7 interrupt (non-maskable) */
     56
     57#define IRQ_USER	8
     58
     59struct irq_data;
     60struct irq_chip;
     61struct irq_desc;
     62extern unsigned int m68k_irq_startup(struct irq_data *data);
     63extern unsigned int m68k_irq_startup_irq(unsigned int irq);
     64extern void m68k_irq_shutdown(struct irq_data *data);
     65extern void m68k_setup_auto_interrupt(void (*handler)(unsigned int,
     66						      struct pt_regs *));
     67extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt);
     68extern void m68k_setup_irq_controller(struct irq_chip *,
     69				      void (*handle)(struct irq_desc *desc),
     70				      unsigned int irq, unsigned int cnt);
     71
     72extern unsigned int irq_canonicalize(unsigned int irq);
     73
     74#else
     75#define irq_canonicalize(irq)  (irq)
     76#endif /* !(CONFIG_M68020 || CONFIG_M68030 || CONFIG_M68040 || CONFIG_M68060) */
     77
     78asmlinkage void do_IRQ(int irq, struct pt_regs *regs);
     79extern atomic_t irq_err_count;
     80
     81#endif /* _M68K_IRQ_H_ */