cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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macints.h (3210B)

      1/*
      2** macints.h -- Macintosh Linux interrupt handling structs and prototypes
      3**
      4** Copyright 1997 by Michael Schmitz
      5**
      6** This file is subject to the terms and conditions of the GNU General Public
      7** License.  See the file COPYING in the main directory of this archive
      8** for more details.
      9**
     10*/
     11
     12#ifndef _ASM_MACINTS_H_
     13#define _ASM_MACINTS_H_
     14
     15#include <asm/irq.h>
     16
     17/*
     18 * Base IRQ number for all Mac68K interrupt sources. Each source
     19 * has eight indexes (base -> base+7).
     20 */
     21
     22#define VIA1_SOURCE_BASE	8
     23#define VIA2_SOURCE_BASE	16
     24#define PSC3_SOURCE_BASE	24
     25#define PSC4_SOURCE_BASE	32
     26#define PSC5_SOURCE_BASE	40
     27#define PSC6_SOURCE_BASE	48
     28#define NUBUS_SOURCE_BASE	56
     29#define BABOON_SOURCE_BASE	64
     30
     31/*
     32 * Maximum IRQ number is BABOON_SOURCE_BASE + 7,
     33 * giving us IRQs up through 71
     34 */
     35
     36#define NUM_MAC_SOURCES		72
     37
     38/*
     39 * clean way to separate IRQ into its source and index
     40 */
     41
     42#define IRQ_SRC(irq)	(irq >> 3)
     43#define	IRQ_IDX(irq)	(irq & 7)
     44
     45/* VIA1 interrupts */
     46#define IRQ_VIA1_0	  (8)		/* one second int. */
     47#define IRQ_VIA1_1        (9)		/* VBlank int. */
     48#define IRQ_MAC_VBL	  IRQ_VIA1_1
     49#define IRQ_VIA1_2	  (10)		/* ADB SR shifts complete */
     50#define IRQ_MAC_ADB	  IRQ_VIA1_2
     51#define IRQ_MAC_ADB_SR	  IRQ_VIA1_2
     52#define IRQ_VIA1_3	  (11)		/* ADB SR CB2 ?? */
     53#define IRQ_MAC_ADB_SD	  IRQ_VIA1_3
     54#define IRQ_VIA1_4        (12)		/* ADB SR ext. clock pulse */
     55#define IRQ_MAC_ADB_CL	  IRQ_VIA1_4
     56#define IRQ_VIA1_5	  (13)
     57#define IRQ_MAC_TIMER_2	  IRQ_VIA1_5
     58#define IRQ_VIA1_6	  (14)
     59#define IRQ_MAC_TIMER_1	  IRQ_VIA1_6
     60#define IRQ_VIA1_7        (15)
     61
     62/* VIA2/RBV interrupts */
     63#define IRQ_VIA2_0	  (16)
     64#define IRQ_MAC_SCSIDRQ	  IRQ_VIA2_0
     65#define IRQ_VIA2_1        (17)
     66#define IRQ_MAC_NUBUS	  IRQ_VIA2_1
     67#define IRQ_VIA2_2	  (18)
     68#define IRQ_VIA2_3	  (19)
     69#define IRQ_MAC_SCSI	  IRQ_VIA2_3
     70#define IRQ_VIA2_4        (20)
     71#define IRQ_VIA2_5	  (21)
     72#define IRQ_VIA2_6	  (22)
     73#define IRQ_VIA2_7        (23)
     74
     75/* Level 3 (PSC, AV Macs only) interrupts */
     76#define IRQ_PSC3_0	  (24)
     77#define IRQ_MAC_MACE	  IRQ_PSC3_0
     78#define IRQ_PSC3_1	  (25)
     79#define IRQ_PSC3_2	  (26)
     80#define IRQ_PSC3_3	  (27)
     81
     82/* Level 4 (PSC, AV Macs only) interrupts */
     83#define IRQ_PSC4_0	  (32)
     84#define IRQ_PSC4_1	  (33)
     85#define IRQ_MAC_SCC_A	  IRQ_PSC4_1
     86#define IRQ_PSC4_2	  (34)
     87#define IRQ_MAC_SCC_B	  IRQ_PSC4_2
     88#define IRQ_PSC4_3	  (35)
     89#define IRQ_MAC_MACE_DMA  IRQ_PSC4_3
     90
     91/* OSS Level 4 interrupts */
     92#define IRQ_MAC_SCC	  (33)
     93
     94/* Level 5 (PSC, AV Macs only) interrupts */
     95#define IRQ_PSC5_0	  (40)
     96#define IRQ_PSC5_1	  (41)
     97#define IRQ_PSC5_2	  (42)
     98#define IRQ_PSC5_3	  (43)
     99
    100/* Level 6 (PSC, AV Macs only) interrupts */
    101#define IRQ_PSC6_0	  (48)
    102#define IRQ_PSC6_1	  (49)
    103#define IRQ_PSC6_2	  (50)
    104#define IRQ_PSC6_3	  (51)
    105
    106/* Nubus interrupts (cascaded to VIA2) */
    107#define IRQ_NUBUS_9	  (56)
    108#define IRQ_NUBUS_A	  (57)
    109#define IRQ_NUBUS_B	  (58)
    110#define IRQ_NUBUS_C	  (59)
    111#define IRQ_NUBUS_D	  (60)
    112#define IRQ_NUBUS_E	  (61)
    113#define IRQ_NUBUS_F	  (62)
    114
    115/* Baboon interrupts (cascaded to nubus slot $C) */
    116#define IRQ_BABOON_0	  (64)
    117#define IRQ_BABOON_1	  (65)
    118#define IRQ_BABOON_2	  (66)
    119#define IRQ_BABOON_3	  (67)
    120
    121#define SLOT2IRQ(x)	  (x + 47)
    122#define IRQ2SLOT(x)	  (x - 47)
    123
    124#endif /* asm/macints.h */