cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mcfslt.h (1240B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/****************************************************************************/
      3
      4/*
      5 *	mcfslt.h -- ColdFire internal Slice (SLT) timer support defines.
      6 *
      7 *	(C) Copyright 2004, Greg Ungerer (gerg@snapgear.com)
      8 *	(C) Copyright 2009, Philippe De Muyter (phdm@macqel.be)
      9 */
     10
     11/****************************************************************************/
     12#ifndef mcfslt_h
     13#define mcfslt_h
     14/****************************************************************************/
     15
     16/*
     17 *	Define the SLT timer register set addresses.
     18 */
     19#define MCFSLT_STCNT		0x00	/* Terminal count */
     20#define MCFSLT_SCR		0x04	/* Control */
     21#define MCFSLT_SCNT		0x08	/* Current count */
     22#define MCFSLT_SSR		0x0C	/* Status */
     23
     24/*
     25 *	Bit definitions for the SCR control register.
     26 */
     27#define MCFSLT_SCR_RUN		0x04000000	/* Run mode (continuous) */
     28#define MCFSLT_SCR_IEN		0x02000000	/* Interrupt enable */
     29#define MCFSLT_SCR_TEN		0x01000000	/* Timer enable */
     30
     31/*
     32 *	Bit definitions for the SSR status register.
     33 */
     34#define MCFSLT_SSR_BE		0x02000000	/* Bus error condition */
     35#define MCFSLT_SSR_TE		0x01000000	/* Timeout condition */
     36
     37/****************************************************************************/
     38#endif	/* mcfslt_h */