mcftimer.h (2357B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/****************************************************************************/ 3 4/* 5 * mcftimer.h -- ColdFire internal TIMER support defines. 6 * 7 * (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com> 8 * (C) Copyright 2000, Lineo Inc. (www.lineo.com) 9 */ 10 11/****************************************************************************/ 12#ifndef mcftimer_h 13#define mcftimer_h 14/****************************************************************************/ 15 16/* 17 * Define the TIMER register set addresses. 18 */ 19#define MCFTIMER_TMR 0x00 /* Timer Mode reg (r/w) */ 20#define MCFTIMER_TRR 0x04 /* Timer Reference (r/w) */ 21#define MCFTIMER_TCR 0x08 /* Timer Capture reg (r/w) */ 22#define MCFTIMER_TCN 0x0C /* Timer Counter reg (r/w) */ 23#if defined(CONFIG_M53xx) || defined(CONFIG_M5441x) 24#define MCFTIMER_TER 0x03 /* Timer Event reg (r/w) */ 25#else 26#define MCFTIMER_TER 0x11 /* Timer Event reg (r/w) */ 27#endif 28 29/* 30 * Bit definitions for the Timer Mode Register (TMR). 31 * Register bit flags are common across ColdFires. 32 */ 33#define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */ 34#define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */ 35#define MCFTIMER_TMR_ANYCE 0x00c0 /* Capture any edge */ 36#define MCFTIMER_TMR_FALLCE 0x0080 /* Capture fallingedge */ 37#define MCFTIMER_TMR_RISECE 0x0040 /* Capture rising edge */ 38#define MCFTIMER_TMR_ENOM 0x0020 /* Enable output toggle */ 39#define MCFTIMER_TMR_DISOM 0x0000 /* Do single output pulse */ 40#define MCFTIMER_TMR_ENORI 0x0010 /* Enable ref interrupt */ 41#define MCFTIMER_TMR_DISORI 0x0000 /* Disable ref interrupt */ 42#define MCFTIMER_TMR_RESTART 0x0008 /* Restart counter */ 43#define MCFTIMER_TMR_FREERUN 0x0000 /* Free running counter */ 44#define MCFTIMER_TMR_CLKTIN 0x0006 /* Input clock is TIN */ 45#define MCFTIMER_TMR_CLK16 0x0004 /* Input clock is /16 */ 46#define MCFTIMER_TMR_CLK1 0x0002 /* Input clock is /1 */ 47#define MCFTIMER_TMR_CLKSTOP 0x0000 /* Stop counter */ 48#define MCFTIMER_TMR_ENABLE 0x0001 /* Enable timer */ 49#define MCFTIMER_TMR_DISABLE 0x0000 /* Disable timer */ 50 51/* 52 * Bit definitions for the Timer Event Registers (TER). 53 */ 54#define MCFTIMER_TER_CAP 0x01 /* Capture event */ 55#define MCFTIMER_TER_REF 0x02 /* Reference event */ 56 57/****************************************************************************/ 58#endif /* mcftimer_h */