cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

Kconfig.platform (1857B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2# For a description of the syntax of this configuration file,
      3# see Documentation/kbuild/kconfig-language.rst.
      4#
      5# Platform selection Kconfig menu for MicroBlaze targets
      6#
      7
      8menu "Platform options"
      9
     10config OPT_LIB_FUNCTION
     11	bool "Optimalized lib function"
     12	default y
     13	help
     14	  Allows turn on optimalized library function (memcpy and memmove).
     15	  They are optimized by using word alignment. This will work
     16	  fine if both source and destination are aligned on the same
     17	  boundary. However, if they are aligned on different boundaries
     18	  shifts will be necessary. This might result in bad performance
     19	  on MicroBlaze systems without a barrel shifter.
     20
     21config OPT_LIB_ASM
     22	bool "Optimalized lib function ASM"
     23	depends on OPT_LIB_FUNCTION && (XILINX_MICROBLAZE0_USE_BARREL = 1)
     24	depends on CPU_BIG_ENDIAN
     25	default n
     26	help
     27	  Allows turn on optimalized library function (memcpy and memmove).
     28	  Function are written in asm code.
     29
     30# Definitions for MICROBLAZE0
     31comment "Definitions for MICROBLAZE0"
     32
     33config KERNEL_BASE_ADDR
     34	hex "Physical address where Linux Kernel is"
     35	default "0x90000000"
     36	help
     37	  BASE Address for kernel
     38
     39config XILINX_MICROBLAZE0_FAMILY
     40	string "Targeted FPGA family"
     41	default "virtex5"
     42
     43config XILINX_MICROBLAZE0_USE_MSR_INSTR
     44	int "USE_MSR_INSTR range (0:1)"
     45	default 0
     46
     47config XILINX_MICROBLAZE0_USE_PCMP_INSTR
     48	int "USE_PCMP_INSTR range (0:1)"
     49	default 0
     50
     51config XILINX_MICROBLAZE0_USE_BARREL
     52	int "USE_BARREL range (0:1)"
     53	default 0
     54
     55config XILINX_MICROBLAZE0_USE_DIV
     56	int "USE_DIV range (0:1)"
     57	default 0
     58
     59config XILINX_MICROBLAZE0_USE_HW_MUL
     60	int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)"
     61	default 0
     62
     63config XILINX_MICROBLAZE0_USE_FPU
     64	int "USE_FPU values (0=NONE, 1=BASIC, 2=EXTENDED)"
     65	default 0
     66
     67config XILINX_MICROBLAZE0_HW_VER
     68	string "Core version number"
     69	default "7.10.d"
     70
     71endmenu