cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

mb.c (4149B)

      1/*
      2 * CPU-version specific code
      3 *
      4 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
      5 * Copyright (C) 2006-2009 PetaLogix
      6 *
      7 * This file is subject to the terms and conditions of the GNU General Public
      8 * License. See the file "COPYING" in the main directory of this archive
      9 * for more details.
     10 */
     11
     12#include <linux/init.h>
     13#include <linux/string.h>
     14#include <linux/seq_file.h>
     15#include <linux/cpu.h>
     16#include <linux/initrd.h>
     17
     18#include <linux/bug.h>
     19#include <asm/cpuinfo.h>
     20#include <linux/delay.h>
     21#include <linux/io.h>
     22#include <asm/page.h>
     23#include <linux/param.h>
     24#include <asm/pvr.h>
     25#include <asm/sections.h>
     26#include <asm/setup.h>
     27
     28static int show_cpuinfo(struct seq_file *m, void *v)
     29{
     30	char *fpga_family = "Unknown";
     31	char *cpu_ver = "Unknown";
     32	int i;
     33
     34	/* Denormalised to get the fpga family string */
     35	for (i = 0; family_string_lookup[i].s != NULL; i++) {
     36		if (cpuinfo.fpga_family_code == family_string_lookup[i].k) {
     37			fpga_family = (char *)family_string_lookup[i].s;
     38			break;
     39		}
     40	}
     41
     42	/* Denormalised to get the hw version string */
     43	for (i = 0; cpu_ver_lookup[i].s != NULL; i++) {
     44		if (cpuinfo.ver_code == cpu_ver_lookup[i].k) {
     45			cpu_ver = (char *)cpu_ver_lookup[i].s;
     46			break;
     47		}
     48	}
     49
     50	seq_printf(m,
     51		   "CPU-Family:	MicroBlaze\n"
     52		   "FPGA-Arch:	%s\n"
     53		   "CPU-Ver:	%s, %s endian\n"
     54		   "CPU-MHz:	%d.%02d\n"
     55		   "BogoMips:	%lu.%02lu\n",
     56		   fpga_family,
     57		   cpu_ver,
     58		   cpuinfo.endian ? "little" : "big",
     59		   cpuinfo.cpu_clock_freq / 1000000,
     60		   cpuinfo.cpu_clock_freq % 1000000,
     61		   loops_per_jiffy / (500000 / HZ),
     62		   (loops_per_jiffy / (5000 / HZ)) % 100);
     63
     64	seq_printf(m,
     65		   "HW:\n Shift:\t\t%s\n"
     66		   " MSR:\t\t%s\n"
     67		   " PCMP:\t\t%s\n"
     68		   " DIV:\t\t%s\n",
     69		   (cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no",
     70		   (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no",
     71		   (cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no",
     72		   (cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no");
     73
     74	seq_printf(m, " MMU:\t\t%x\n", cpuinfo.mmu);
     75
     76	seq_printf(m,
     77		   " MUL:\t\t%s\n"
     78		   " FPU:\t\t%s\n",
     79		   (cpuinfo.use_mult & PVR2_USE_MUL64_MASK) ? "v2" :
     80		   (cpuinfo.use_mult & PVR0_USE_HW_MUL_MASK) ? "v1" : "no",
     81		   (cpuinfo.use_fpu & PVR2_USE_FPU2_MASK) ? "v2" :
     82		   (cpuinfo.use_fpu & PVR0_USE_FPU_MASK) ? "v1" : "no");
     83
     84	seq_printf(m,
     85		   " Exc:\t\t%s%s%s%s%s%s%s%s\n",
     86		   (cpuinfo.use_exc & PVR2_OPCODE_0x0_ILL_MASK) ? "op0x0 " : "",
     87		   (cpuinfo.use_exc & PVR2_UNALIGNED_EXC_MASK) ? "unal " : "",
     88		   (cpuinfo.use_exc & PVR2_ILL_OPCODE_EXC_MASK) ? "ill " : "",
     89		   (cpuinfo.use_exc & PVR2_IOPB_BUS_EXC_MASK) ? "iopb " : "",
     90		   (cpuinfo.use_exc & PVR2_DOPB_BUS_EXC_MASK) ? "dopb " : "",
     91		   (cpuinfo.use_exc & PVR2_DIV_ZERO_EXC_MASK) ? "zero " : "",
     92		   (cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
     93		   (cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
     94
     95	seq_printf(m,
     96		   "Stream-insns:\t%sprivileged\n",
     97		   cpuinfo.mmu_privins ? "un" : "");
     98
     99	if (cpuinfo.use_icache)
    100		seq_printf(m,
    101			   "Icache:\t\t%ukB\tline length:\t%dB\n",
    102			   cpuinfo.icache_size >> 10,
    103			   cpuinfo.icache_line_length);
    104	else
    105		seq_puts(m, "Icache:\t\tno\n");
    106
    107	if (cpuinfo.use_dcache) {
    108		seq_printf(m,
    109			   "Dcache:\t\t%ukB\tline length:\t%dB\n",
    110			   cpuinfo.dcache_size >> 10,
    111			   cpuinfo.dcache_line_length);
    112		seq_puts(m, "Dcache-Policy:\t");
    113		if (cpuinfo.dcache_wb)
    114			seq_puts(m, "write-back\n");
    115		else
    116			seq_puts(m, "write-through\n");
    117	} else {
    118		seq_puts(m, "Dcache:\t\tno\n");
    119	}
    120
    121	seq_printf(m,
    122		   "HW-Debug:\t%s\n",
    123		   cpuinfo.hw_debug ? "yes" : "no");
    124
    125	seq_printf(m,
    126		   "PVR-USR1:\t%02x\n"
    127		   "PVR-USR2:\t%08x\n",
    128		   cpuinfo.pvr_user1,
    129		   cpuinfo.pvr_user2);
    130
    131	seq_printf(m, "Page size:\t%lu\n", PAGE_SIZE);
    132
    133	return 0;
    134}
    135
    136static void *c_start(struct seq_file *m, loff_t *pos)
    137{
    138	int i = *pos;
    139
    140	return i < NR_CPUS ? (void *) (i + 1) : NULL;
    141}
    142
    143static void *c_next(struct seq_file *m, void *v, loff_t *pos)
    144{
    145	++*pos;
    146	return c_start(m, pos);
    147}
    148
    149static void c_stop(struct seq_file *m, void *v)
    150{
    151}
    152
    153const struct seq_operations cpuinfo_op = {
    154	.start = c_start,
    155	.next = c_next,
    156	.stop = c_stop,
    157	.show = show_cpuinfo,
    158};