cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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misc.S (1389B)


      1/*
      2 * Miscellaneous low-level MMU functions.
      3 *
      4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
      5 * Copyright (C) 2008-2009 PetaLogix
      6 * Copyright (C) 2007 Xilinx, Inc.  All rights reserved.
      7 *
      8 * Derived from arch/ppc/kernel/misc.S
      9 *
     10 * This file is subject to the terms and conditions of the GNU General
     11 * Public License. See the file COPYING in the main directory of this
     12 * archive for more details.
     13 */
     14
     15#include <linux/linkage.h>
     16#include <linux/sys.h>
     17#include <asm/unistd.h>
     18#include <linux/errno.h>
     19#include <asm/mmu.h>
     20#include <asm/page.h>
     21
     22	.text
     23/*
     24 * Flush MMU TLB
     25 *
     26 * We avoid flushing the pinned 0, 1 and possibly 2 entries.
     27 */
     28.globl _tlbia;
     29.type  _tlbia, @function
     30.align 4;
     31_tlbia:
     32	lwi	r12, r0, tlb_skip;
     33	/* isync */
     34_tlbia_1:
     35	mts	rtlbx, r12
     36	nop
     37	mts	rtlbhi, r0 /* flush: ensure V is clear */
     38	nop
     39	rsubi	r11, r12, MICROBLAZE_TLB_SIZE - 1
     40	bneid	r11, _tlbia_1 /* loop for all entries */
     41	addik	r12, r12, 1
     42	mbar	1 /* sync */
     43	rtsd	r15, 8
     44	nop
     45	.size  _tlbia, . - _tlbia
     46
     47/*
     48 * Flush MMU TLB for a particular address (in r5)
     49 */
     50.globl _tlbie;
     51.type  _tlbie, @function
     52.align 4;
     53_tlbie:
     54	mts	rtlbsx, r5 /* look up the address in TLB */
     55	nop
     56	mfs	r12, rtlbx /* Retrieve index */
     57	nop
     58	blti	r12, _tlbie_1 /* Check if found */
     59	mts	rtlbhi, r0 /* flush: ensure V is clear */
     60	nop
     61	mbar	1 /* sync */
     62_tlbie_1:
     63	rtsd	r15, 8
     64	nop
     65
     66	.size  _tlbie, . - _tlbie