cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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vmlinux.lds.S (2851B)


      1/*
      2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
      3 * Copyright (C) 2008-2009 PetaLogix
      4 * Copyright (C) 2006 Atmark Techno, Inc.
      5 *
      6 * This file is subject to the terms and conditions of the GNU General Public
      7 * License. See the file "COPYING" in the main directory of this archive
      8 * for more details.
      9 */
     10
     11OUTPUT_ARCH(microblaze)
     12ENTRY(microblaze_start)
     13
     14#define RO_EXCEPTION_TABLE_ALIGN	16
     15
     16#include <asm/cache.h>
     17#include <asm/page.h>
     18#include <asm-generic/vmlinux.lds.h>
     19#include <asm/thread_info.h>
     20
     21#ifdef __MICROBLAZEEL__
     22jiffies = jiffies_64;
     23#else
     24jiffies = jiffies_64 + 4;
     25#endif
     26
     27SECTIONS {
     28	. = CONFIG_KERNEL_START;
     29	microblaze_start = CONFIG_KERNEL_BASE_ADDR;
     30	.text : AT(ADDR(.text) - LOAD_OFFSET) {
     31		_text = . ;
     32		_stext = . ;
     33		HEAD_TEXT
     34		TEXT_TEXT
     35		*(.fixup)
     36		EXIT_TEXT
     37		EXIT_CALL
     38		SCHED_TEXT
     39		CPUIDLE_TEXT
     40		LOCK_TEXT
     41		KPROBES_TEXT
     42		IRQENTRY_TEXT
     43		SOFTIRQENTRY_TEXT
     44		. = ALIGN (4) ;
     45		_etext = . ;
     46	}
     47
     48	. = ALIGN (8) ;
     49	__fdt_blob : AT(ADDR(__fdt_blob) - LOAD_OFFSET) {
     50		_fdt_start = . ;		/* place for fdt blob */
     51		*(__fdt_blob) ;			/* Any link-placed DTB */
     52	        . = _fdt_start + 0x10000;	/* Pad up to 64kbyte */
     53		_fdt_end = . ;
     54	}
     55
     56	. = ALIGN(16);
     57	RO_DATA(4096)
     58
     59	/*
     60	 * sdata2 section can go anywhere, but must be word aligned
     61	 * and SDA2_BASE must point to the middle of it
     62	 */
     63	.sdata2 : AT(ADDR(.sdata2) - LOAD_OFFSET) {
     64		_ssrw = .;
     65		. = ALIGN(PAGE_SIZE); /* page aligned when MMU used */
     66		*(.sdata2)
     67	. = ALIGN(8);
     68	_essrw = .;
     69	_ssrw_size = _essrw - _ssrw;
     70	_KERNEL_SDA2_BASE_ = _ssrw + (_ssrw_size / 2);
     71	}
     72
     73	_sdata = . ;
     74	RW_DATA(32, PAGE_SIZE, THREAD_SIZE)
     75	_edata = . ;
     76
     77	/* Under the microblaze ABI, .sdata and .sbss must be contiguous */
     78	. = ALIGN(8);
     79	.sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
     80		_ssro = .;
     81		*(.sdata)
     82	}
     83
     84	.sbss :	AT(ADDR(.sbss) - LOAD_OFFSET) {
     85		_ssbss = .;
     86		*(.sbss)
     87		_esbss = .;
     88		_essro = .;
     89		_ssro_size = _essro - _ssro ;
     90		_KERNEL_SDA_BASE_ = _ssro + (_ssro_size / 2) ;
     91	}
     92
     93	PERCPU_SECTION(L1_CACHE_BYTES)
     94
     95	. = ALIGN(PAGE_SIZE);
     96	__init_begin = .;
     97
     98	INIT_TEXT_SECTION(PAGE_SIZE)
     99
    100	.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
    101		INIT_DATA
    102	}
    103
    104	. = ALIGN(4);
    105	.init.ivt : AT(ADDR(.init.ivt) - LOAD_OFFSET) {
    106		__ivt_start = .;
    107		*(.init.ivt)
    108		__ivt_end = .;
    109	}
    110
    111	.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
    112		INIT_SETUP(0)
    113	}
    114
    115	.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET ) {
    116		INIT_CALLS
    117	}
    118
    119	.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
    120		CON_INITCALL
    121	}
    122
    123	__init_end_before_initramfs = .;
    124
    125	.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
    126		INIT_RAM_FS
    127	}
    128
    129	__init_end = .;
    130
    131	.bss ALIGN (PAGE_SIZE) : AT(ADDR(.bss) - LOAD_OFFSET) {
    132		/* page aligned when MMU used */
    133		__bss_start = . ;
    134			*(.bss*)
    135			*(COMMON)
    136		. = ALIGN (4) ;
    137		__bss_stop = . ;
    138	}
    139	. = ALIGN(PAGE_SIZE);
    140	_end = .;
    141
    142	DISCARDS
    143}