cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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serial.c (2443B)


      1/*
      2 * 8250 UART probe driver for the BCM47XX platforms
      3 * Author: Aurelien Jarno
      4 *
      5 * This file is subject to the terms and conditions of the GNU General Public
      6 * License.  See the file "COPYING" in the main directory of this archive
      7 * for more details.
      8 *
      9 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
     10 */
     11
     12#include <linux/init.h>
     13#include <linux/serial.h>
     14#include <linux/serial_8250.h>
     15#include <linux/ssb/ssb.h>
     16#include <bcm47xx.h>
     17
     18static struct plat_serial8250_port uart8250_data[5];
     19
     20static struct platform_device uart8250_device = {
     21	.name			= "serial8250",
     22	.id			= PLAT8250_DEV_PLATFORM,
     23	.dev			= {
     24		.platform_data	= uart8250_data,
     25	},
     26};
     27
     28#ifdef CONFIG_BCM47XX_SSB
     29static int __init uart8250_init_ssb(void)
     30{
     31	int i;
     32	struct ssb_mipscore *mcore = &(bcm47xx_bus.ssb.mipscore);
     33
     34	memset(&uart8250_data, 0,  sizeof(uart8250_data));
     35
     36	for (i = 0; i < mcore->nr_serial_ports &&
     37		    i < ARRAY_SIZE(uart8250_data) - 1; i++) {
     38		struct plat_serial8250_port *p = &(uart8250_data[i]);
     39		struct ssb_serial_port *ssb_port = &(mcore->serial_ports[i]);
     40
     41		p->mapbase = (unsigned int)ssb_port->regs;
     42		p->membase = (void *)ssb_port->regs;
     43		p->irq = ssb_port->irq + 2;
     44		p->uartclk = ssb_port->baud_base;
     45		p->regshift = ssb_port->reg_shift;
     46		p->iotype = UPIO_MEM;
     47		p->flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
     48	}
     49	return platform_device_register(&uart8250_device);
     50}
     51#endif
     52
     53#ifdef CONFIG_BCM47XX_BCMA
     54static int __init uart8250_init_bcma(void)
     55{
     56	int i;
     57	struct bcma_drv_cc *cc = &(bcm47xx_bus.bcma.bus.drv_cc);
     58
     59	memset(&uart8250_data, 0,  sizeof(uart8250_data));
     60
     61	for (i = 0; i < cc->nr_serial_ports &&
     62		    i < ARRAY_SIZE(uart8250_data) - 1; i++) {
     63		struct plat_serial8250_port *p = &(uart8250_data[i]);
     64		struct bcma_serial_port *bcma_port;
     65		bcma_port = &(cc->serial_ports[i]);
     66
     67		p->mapbase = (unsigned int)bcma_port->regs;
     68		p->membase = (void *)bcma_port->regs;
     69		p->irq = bcma_port->irq;
     70		p->uartclk = bcma_port->baud_base;
     71		p->regshift = bcma_port->reg_shift;
     72		p->iotype = UPIO_MEM;
     73		p->flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
     74	}
     75	return platform_device_register(&uart8250_device);
     76}
     77#endif
     78
     79static int __init uart8250_init(void)
     80{
     81	switch (bcm47xx_bus_type) {
     82#ifdef CONFIG_BCM47XX_SSB
     83	case BCM47XX_BUS_TYPE_SSB:
     84		return uart8250_init_ssb();
     85#endif
     86#ifdef CONFIG_BCM47XX_BCMA
     87	case BCM47XX_BUS_TYPE_BCMA:
     88		return uart8250_init_bcma();
     89#endif
     90	}
     91	return -EINVAL;
     92}
     93device_initcall(uart8250_init);