cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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bcm3384_viper.dtsi (2222B)

      1// SPDX-License-Identifier: GPL-2.0
      2/ {
      3	#address-cells = <1>;
      4	#size-cells = <1>;
      5	compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";
      6
      7	memory@0 {
      8		device_type = "memory";
      9
     10		/* Typical ranges.  The bootloader should fill these in. */
     11		reg = <0x06000000 0x02000000>,
     12		      <0x0e000000 0x02000000>;
     13	};
     14
     15	cpus {
     16		#address-cells = <1>;
     17		#size-cells = <0>;
     18
     19		/* 1/2 of the CPU core clock (standard MIPS behavior) */
     20		mips-hpt-frequency = <300000000>;
     21
     22		cpu@0 {
     23			compatible = "brcm,bmips4350";
     24			device_type = "cpu";
     25			reg = <0>;
     26		};
     27	};
     28
     29	cpu_intc: cpu_intc {
     30		#address-cells = <0>;
     31		compatible = "mti,cpu-interrupt-controller";
     32
     33		interrupt-controller;
     34		#interrupt-cells = <1>;
     35	};
     36
     37	clocks {
     38		periph_clk: periph_clk {
     39			compatible = "fixed-clock";
     40			#clock-cells = <0>;
     41			clock-frequency = <54000000>;
     42		};
     43	};
     44
     45	aliases {
     46		uart0 = &uart0;
     47	};
     48
     49	ubus {
     50		#address-cells = <1>;
     51		#size-cells = <1>;
     52
     53		compatible = "brcm,ubus", "simple-bus";
     54		ranges;
     55		/* No dma-ranges on Viper. */
     56
     57		periph_intc: periph_intc@14e00048 {
     58			compatible = "brcm,bcm3380-l2-intc";
     59			reg = <0x14e00048 0x4 0x14e0004c 0x4>,
     60			      <0x14e00350 0x4 0x14e00354 0x4>;
     61
     62			interrupt-controller;
     63			#interrupt-cells = <1>;
     64
     65			interrupt-parent = <&cpu_intc>;
     66			interrupts = <4>;
     67		};
     68
     69		cmips_intc: cmips_intc@151f8048 {
     70			compatible = "brcm,bcm3380-l2-intc";
     71			reg = <0x151f8048 0x4 0x151f804c 0x4>;
     72
     73			interrupt-controller;
     74			#interrupt-cells = <1>;
     75
     76			interrupt-parent = <&periph_intc>;
     77			interrupts = <30>;
     78			brcm,int-map-mask = <0xffffffff>;
     79		};
     80
     81		uart0: serial@14e00520 {
     82			compatible = "brcm,bcm6345-uart";
     83			reg = <0x14e00520 0x18>;
     84			interrupt-parent = <&periph_intc>;
     85			interrupts = <2>;
     86			clocks = <&periph_clk>;
     87			status = "disabled";
     88		};
     89
     90		ehci0: usb@15400300 {
     91			compatible = "brcm,bcm3384-ehci", "generic-ehci";
     92			reg = <0x15400300 0x100>;
     93			big-endian;
     94			interrupt-parent = <&periph_intc>;
     95			interrupts = <41>;
     96			status = "disabled";
     97		};
     98
     99		ohci0: usb@15400400 {
    100			compatible = "brcm,bcm3384-ohci", "generic-ohci";
    101			reg = <0x15400400 0x100>;
    102			big-endian;
    103			no-big-frame-no;
    104			interrupt-parent = <&periph_intc>;
    105			interrupts = <40>;
    106			status = "disabled";
    107		};
    108	};
    109};