cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

easy50712.dts (2230B)

      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4/include/ "danube.dtsi"
      5
      6/ {
      7	chosen {
      8		bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
      9	};
     10
     11	memory@0 {
     12		device_type = "memory";
     13		reg = <0x0 0x2000000>;
     14	};
     15
     16	fpi@10000000 {
     17		#address-cells = <1>;
     18		#size-cells = <1>;
     19		localbus@0 {
     20			#address-cells = <2>;
     21			#size-cells = <1>;
     22			ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
     23				1 0 0x4000000 0x4000010>; /* addsel1 */
     24			compatible = "lantiq,localbus", "simple-bus";
     25
     26			nor-boot@0 {
     27				compatible = "lantiq,nor";
     28				bank-width = <2>;
     29				reg = <0 0x0 0x2000000>;
     30				#address-cells = <1>;
     31				#size-cells = <1>;
     32
     33				partition@0 {
     34					label = "uboot";
     35					reg = <0x00000 0x10000>; /* 64 KB */
     36				};
     37
     38				partition@10000 {
     39					label = "uboot_env";
     40					reg = <0x10000 0x10000>; /* 64 KB */
     41				};
     42
     43				partition@20000 {
     44					label = "linux";
     45					reg = <0x20000 0x3d0000>;
     46				};
     47
     48				partition@400000 {
     49					label = "rootfs";
     50					reg = <0x400000 0x400000>;
     51				};
     52			};
     53		};
     54
     55		gpio: pinmux@e100b10 {
     56			compatible = "lantiq,danube-pinctrl";
     57			pinctrl-names = "default";
     58			pinctrl-0 = <&state_default>;
     59
     60			#gpio-cells = <2>;
     61			gpio-controller;
     62			reg = <0xe100b10 0xa0>;
     63
     64			state_default: pinmux {
     65				stp {
     66					lantiq,groups = "stp";
     67					lantiq,function = "stp";
     68				};
     69				exin {
     70					lantiq,groups = "exin1";
     71					lantiq,function = "exin";
     72				};
     73				pci {
     74					lantiq,groups = "gnt1";
     75					lantiq,function = "pci";
     76				};
     77				conf_out {
     78					lantiq,pins = "io4", "io5", "io6"; /* stp */
     79					lantiq,open-drain;
     80					lantiq,pull = <0>;
     81				};
     82			};
     83		};
     84
     85		etop@e180000 {
     86			compatible = "lantiq,etop-xway";
     87			reg = <0xe180000 0x40000>;
     88			interrupt-parent = <&icu0>;
     89			interrupts = <73 78>;
     90			phy-mode = "rmii";
     91			mac-address = [ 00 11 22 33 44 55 ];
     92		};
     93
     94		stp0: stp@e100bb0 {
     95			#gpio-cells = <2>;
     96			compatible = "lantiq,gpio-stp-xway";
     97			gpio-controller;
     98			reg = <0xe100bb0 0x40>;
     99
    100			lantiq,shadow = <0xfff>;
    101			lantiq,groups = <0x3>;
    102		};
    103
    104		pci@e105400 {
    105			lantiq,bus-clock = <33333333>;
    106			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
    107			interrupt-map = <
    108				0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
    109			>;
    110			gpios-reset = <&gpio 21 0>;
    111			req-mask = <0x1>;		/* GNT1 */
    112		};
    113
    114	};
    115};