cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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serval_common.dtsi (2227B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (c) 2020 Microsemi Corporation
      4 */
      5
      6#include "serval.dtsi"
      7
      8/ {
      9	aliases {
     10		serial0 = &uart0;
     11		i2c104  = &i2c104;
     12		i2c105  = &i2c105;
     13		i2c106  = &i2c106;
     14		i2c107  = &i2c107;
     15		i2c108  = &i2c108;
     16		i2c109  = &i2c109;
     17	};
     18
     19	chosen {
     20		stdout-path = "serial0:115200n8";
     21	};
     22
     23	i2c0_imux: i2c0-imux{
     24		compatible = "i2c-mux-pinctrl";
     25		#address-cells = <1>;
     26		#size-cells = <0>;
     27		i2c-parent = <&i2c0>;
     28		pinctrl-names =
     29		"i2c104", "i2c105", "i2c106", "i2c107",
     30		"i2c108", "i2c109", "idle";
     31		pinctrl-0 = <&i2cmux_0>;
     32		pinctrl-1 = <&i2cmux_1>;
     33		pinctrl-2 = <&i2cmux_2>;
     34		pinctrl-3 = <&i2cmux_3>;
     35		pinctrl-4 = <&i2cmux_4>;
     36		pinctrl-5 = <&i2cmux_5>;
     37		pinctrl-6 = <&i2cmux_pins_i>;
     38		i2c104: i2c_sfp0@0 {
     39			reg = <0>;
     40			#address-cells = <1>;
     41			#size-cells = <0>;
     42		};
     43		i2c105: i2c_sfp1@1 {
     44			reg = <1>;
     45			#address-cells = <1>;
     46			#size-cells = <0>;
     47		};
     48		i2c106: i2c_sfp2@2 {
     49			reg = <2>;
     50			#address-cells = <1>;
     51			#size-cells = <0>;
     52		};
     53		i2c107: i2c_sfp3@3 {
     54			reg = <3>;
     55			#address-cells = <1>;
     56			#size-cells = <0>;
     57		};
     58		i2c108: i2c_sfp4@4 {
     59			reg = <4>;
     60			#address-cells = <1>;
     61			#size-cells = <0>;
     62		};
     63		i2c109: i2c_sfp5@5 {
     64			reg = <5>;
     65			#address-cells = <1>;
     66			#size-cells = <0>;
     67		};
     68};
     69
     70};
     71
     72&uart0 {
     73	status = "okay";
     74};
     75
     76&uart2 {
     77	status = "okay";
     78};
     79
     80&gpio {
     81	i2c_pins: i2c-pins {
     82		pins = "GPIO_7"; /* No "default" scl for i2c0 */
     83		function = "twi";
     84	};
     85	i2cmux_pins_i: i2cmux-pins {
     86		pins = "GPIO_11", "GPIO_12", "GPIO_18", "GPIO_19",
     87			"GPIO_20", "GPIO_21";
     88		function = "twi_scl_m";
     89		output-low;
     90	};
     91	i2cmux_0: i2cmux-0-pins {
     92		pins = "GPIO_11";
     93		function = "twi_scl_m";
     94		output-high;
     95	};
     96	i2cmux_1: i2cmux-1-pins {
     97		pins = "GPIO_12";
     98		function = "twi_scl_m";
     99		output-high;
    100	};
    101	i2cmux_2: i2cmux-2-pins {
    102		pins = "GPIO_18";
    103		function = "twi_scl_m";
    104		output-high;
    105	};
    106	i2cmux_3: i2cmux-3-pins {
    107		pins = "GPIO_19";
    108		function = "twi_scl_m";
    109		output-high;
    110	};
    111	i2cmux_4: i2cmux-4-pins {
    112		pins = "GPIO_20";
    113		function = "twi_scl_m";
    114		output-high;
    115	};
    116	i2cmux_5: i2cmux-5-pins {
    117		pins = "GPIO_21";
    118		function = "twi_scl_m";
    119		output-high;
    120	};
    121};
    122
    123&i2c0 {
    124	status = "okay";
    125	i2c-sda-hold-time-ns = <300>;
    126};
    127