cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pic32mzda_sk.dts (2624B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
      4 */
      5
      6/dts-v1/;
      7
      8#include <dt-bindings/gpio/gpio.h>
      9#include <dt-bindings/interrupt-controller/irq.h>
     10
     11#include "pic32mzda.dtsi"
     12
     13/ {
     14	compatible = "microchip,pic32mzda-sk", "microchip,pic32mzda";
     15	model = "Microchip PIC32MZDA Starter Kit";
     16
     17	memory {
     18		device_type = "memory";
     19		reg = <0x08000000 0x08000000>;
     20	};
     21
     22	chosen {
     23		bootargs = "earlyprintk=ttyPIC1,115200n8r console=ttyPIC1,115200n8";
     24	};
     25
     26	leds0 {
     27		compatible = "gpio-leds";
     28		pinctrl-names = "default";
     29		pinctrl-0 = <&user_leds_s0>;
     30
     31		led@1 {
     32			label = "pic32mzda_sk:red:led1";
     33			gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
     34			linux,default-trigger = "heartbeat";
     35		};
     36
     37		led@2 {
     38			label = "pic32mzda_sk:yellow:led2";
     39			gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
     40			linux,default-trigger = "mmc0";
     41		};
     42
     43		led@3 {
     44			label = "pic32mzda_sk:green:led3";
     45			gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
     46			default-state = "on";
     47		};
     48	};
     49
     50	keys0 {
     51		compatible = "gpio-keys";
     52		pinctrl-0 = <&user_buttons_s0>;
     53		pinctrl-names = "default";
     54
     55		#address-cells = <1>;
     56		#size-cells = <0>;
     57
     58		button@sw1 {
     59			label = "ESC";
     60			linux,code = <1>;
     61			gpios = <&gpio1 12 0>;
     62		};
     63
     64		button@sw2 {
     65			label = "Home";
     66			linux,code = <102>;
     67			gpios = <&gpio1 13 0>;
     68		};
     69
     70		button@sw3 {
     71			label = "Menu";
     72			linux,code = <139>;
     73			gpios = <&gpio1 14 0>;
     74		};
     75	};
     76};
     77
     78&uart2 {
     79	pinctrl-names = "default";
     80	pinctrl-0 = <&pinctrl_uart2>;
     81	status = "okay";
     82};
     83
     84&uart4 {
     85	pinctrl-names = "default";
     86	pinctrl-0 = <&pinctrl_uart4>;
     87	status = "okay";
     88};
     89
     90&sdhci {
     91	pinctrl-names = "default";
     92	pinctrl-0 = <&pinctrl_sdhc1>;
     93	status = "okay";
     94	assigned-clocks = <&rootclk REF2CLK>, <&rootclk REF4CLK>,
     95		<&rootclk REF5CLK>;
     96	assigned-clock-rates = <50000000>, <25000000>, <40000000>;
     97};
     98
     99&pic32_pinctrl {
    100
    101	pinctrl_sdhc1: sdhc1_pins0 {
    102		pins = "A6", "D4", "G13", "G12", "G14", "A7", "A0";
    103		microchip,digital;
    104	};
    105
    106	user_leds_s0: user_leds_s0 {
    107		pins = "H0", "H1", "H2";
    108		output-low;
    109		microchip,digital;
    110	};
    111
    112	user_buttons_s0: user_buttons_s0 {
    113		pins = "B12", "B13", "B14";
    114		microchip,digital;
    115		input-enable;
    116		bias-pull-up;
    117	};
    118
    119	pinctrl_uart2: pinctrl_uart2 {
    120		uart2-tx {
    121			pins = "G9";
    122			function = "U2TX";
    123			microchip,digital;
    124			output-high;
    125		};
    126		uart2-rx {
    127			pins = "B0";
    128			function = "U2RX";
    129			microchip,digital;
    130			input-enable;
    131		};
    132	};
    133
    134	pinctrl_uart4: uart4-0 {
    135		uart4-tx {
    136			pins = "C3";
    137			function = "U4TX";
    138			microchip,digital;
    139			output-high;
    140		};
    141		uart4-rx {
    142			pins = "E8";
    143			function = "U4RX";
    144			microchip,digital;
    145			input-enable;
    146		};
    147	};
    148};