cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ar9132_tl_wr1043nd_v1.dts (1749B)

      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4#include <dt-bindings/gpio/gpio.h>
      5#include <dt-bindings/input/input.h>
      6
      7#include "ar9132.dtsi"
      8
      9/ {
     10	compatible = "tplink,tl-wr1043nd-v1", "qca,ar9132";
     11	model = "TP-Link TL-WR1043ND Version 1";
     12
     13	memory@0 {
     14		device_type = "memory";
     15		reg = <0x0 0x2000000>;
     16	};
     17
     18	extosc: ref {
     19		compatible = "fixed-clock";
     20		#clock-cells = <0>;
     21		clock-frequency = <40000000>;
     22	};
     23
     24	gpio-keys {
     25		compatible = "gpio-keys";
     26		#address-cells = <1>;
     27		#size-cells = <0>;
     28
     29		button@0 {
     30			label = "reset";
     31			linux,code = <KEY_RESTART>;
     32			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
     33			debounce-interval = <60>;
     34		};
     35
     36		button@1 {
     37			label = "qss";
     38			linux,code = <KEY_WPS_BUTTON>;
     39			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
     40			debounce-interval = <60>;
     41		};
     42	};
     43
     44	leds {
     45		compatible = "gpio-leds";
     46		led@0 {
     47			label = "tp-link:green:usb";
     48			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
     49		};
     50
     51		led@1 {
     52			label = "tp-link:green:system";
     53			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
     54			linux,default-trigger = "heartbeat";
     55		};
     56
     57		led@2 {
     58			label = "tp-link:green:qss";
     59			gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
     60		};
     61
     62		led@3 {
     63			label = "tp-link:green:wlan";
     64			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
     65		};
     66	};
     67};
     68
     69&uart {
     70	status = "okay";
     71};
     72
     73&pll {
     74	clocks = <&extosc>;
     75};
     76
     77&usb {
     78	status = "okay";
     79};
     80
     81&usb_phy {
     82	status = "okay";
     83};
     84
     85&spi {
     86	status = "okay";
     87	num-cs = <1>;
     88
     89	flash@0 {
     90		#address-cells = <1>;
     91		#size-cells = <1>;
     92		compatible = "s25sl064a";
     93		reg = <0>;
     94		spi-max-frequency = <25000000>;
     95
     96		partition@0 {
     97			label = "u-boot";
     98			reg = <0x000000 0x020000>;
     99		};
    100
    101		partition@1 {
    102			label = "firmware";
    103			reg = <0x020000 0x7D0000>;
    104		};
    105
    106		partition@2 {
    107			label = "art";
    108			reg = <0x7F0000 0x010000>;
    109			read-only;
    110		};
    111	};
    112};