cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ar9331_dpt_module.dts (1383B)

      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4#include <dt-bindings/gpio/gpio.h>
      5#include <dt-bindings/input/input.h>
      6#include <dt-bindings/leds/common.h>
      7
      8#include "ar9331.dtsi"
      9
     10/ {
     11	model = "DPTechnics DPT-Module";
     12	compatible = "dptechnics,dpt-module";
     13
     14	aliases {
     15		serial0 = &uart;
     16	};
     17
     18	memory@0 {
     19		device_type = "memory";
     20		reg = <0x0 0x4000000>;
     21	};
     22
     23	leds {
     24		compatible = "gpio-leds";
     25
     26		led-0 {
     27			function = LED_FUNCTION_STATUS;
     28			color = <LED_COLOR_ID_GREEN>;
     29			gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
     30			default-state = "off";
     31		};
     32	};
     33
     34	gpio-keys {
     35		compatible = "gpio-keys";
     36		#address-cells = <1>;
     37		#size-cells = <0>;
     38
     39		button@0 {
     40			label = "reset";
     41			linux,code = <KEY_RESTART>;
     42			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
     43		};
     44	};
     45};
     46
     47&ref {
     48	clock-frequency = <25000000>;
     49};
     50
     51&uart {
     52	status = "okay";
     53};
     54
     55&gpio {
     56	status = "okay";
     57};
     58
     59&usb {
     60	dr_mode = "host";
     61	status = "okay";
     62};
     63
     64&usb_phy {
     65	status = "okay";
     66};
     67
     68&spi {
     69	num-chipselects = <1>;
     70	status = "okay";
     71
     72	/* Winbond 25Q128FVSG SPI flash */
     73	spiflash: w25q128@0 {
     74		#address-cells = <1>;
     75		#size-cells = <1>;
     76		compatible = "winbond,w25q128", "jedec,spi-nor";
     77		spi-max-frequency = <104000000>;
     78		reg = <0>;
     79	};
     80};
     81
     82&eth0 {
     83	status = "okay";
     84};
     85
     86&eth1 {
     87	status = "okay";
     88};
     89
     90&switch_port1 {
     91	label = "lan0";
     92	status = "okay";
     93};
     94
     95&phy_port0 {
     96	status = "okay";
     97};
     98
     99&phy_port4 {
    100	status = "okay";
    101};