cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ar9331_dragino_ms14.dts (1571B)

      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4#include <dt-bindings/gpio/gpio.h>
      5#include <dt-bindings/input/input.h>
      6
      7#include "ar9331.dtsi"
      8
      9/ {
     10	model = "Dragino MS14 (Dragino 2)";
     11	compatible = "dragino,ms14";
     12
     13	aliases {
     14		serial0 = &uart;
     15	};
     16
     17	memory@0 {
     18		device_type = "memory";
     19		reg = <0x0 0x4000000>;
     20	};
     21
     22	leds {
     23		compatible = "gpio-leds";
     24
     25		wlan {
     26			label = "dragino2:red:wlan";
     27			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
     28			default-state = "off";
     29		};
     30
     31		lan {
     32			label = "dragino2:red:lan";
     33			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
     34			default-state = "off";
     35		};
     36
     37		wan {
     38			label = "dragino2:red:wan";
     39			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
     40			default-state = "off";
     41		};
     42
     43		system {
     44			label = "dragino2:red:system";
     45			gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
     46			default-state = "off";
     47		};
     48	};
     49
     50	gpio-keys {
     51		compatible = "gpio-keys";
     52		#address-cells = <1>;
     53		#size-cells = <0>;
     54
     55		button@0 {
     56			label = "jumpstart";
     57			linux,code = <KEY_WPS_BUTTON>;
     58			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
     59		};
     60
     61		button@1 {
     62			label = "reset";
     63			linux,code = <KEY_RESTART>;
     64			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
     65		};
     66	};
     67};
     68
     69&ref {
     70	clock-frequency = <25000000>;
     71};
     72
     73&uart {
     74	status = "okay";
     75};
     76
     77&gpio {
     78	status = "okay";
     79};
     80
     81&usb {
     82	dr_mode = "host";
     83	status = "okay";
     84};
     85
     86&usb_phy {
     87	status = "okay";
     88};
     89
     90&spi {
     91	num-chipselects = <1>;
     92	status = "okay";
     93
     94	/* Winbond 25Q128BVFG SPI flash */
     95	spiflash: w25q128@0 {
     96		#address-cells = <1>;
     97		#size-cells = <1>;
     98		compatible = "winbond,w25q128", "jedec,spi-nor";
     99		spi-max-frequency = <104000000>;
    100		reg = <0>;
    101	};
    102};