cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ar9331_tl_mr3020.dts (1932B)

      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4#include <dt-bindings/gpio/gpio.h>
      5#include <dt-bindings/input/input.h>
      6
      7#include "ar9331.dtsi"
      8
      9/ {
     10	model = "TP-Link TL-MR3020";
     11	compatible = "tplink,tl-mr3020";
     12
     13	aliases {
     14		serial0 = &uart;
     15	};
     16
     17	memory@0 {
     18		device_type = "memory";
     19		reg = <0x0 0x2000000>;
     20	};
     21
     22	leds {
     23		compatible = "gpio-leds";
     24
     25		wlan {
     26			label = "tp-link:green:wlan";
     27			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
     28			default-state = "off";
     29		};
     30
     31		lan {
     32			label = "tp-link:green:lan";
     33			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
     34			default-state = "off";
     35		};
     36
     37		wps {
     38			label = "tp-link:green:wps";
     39			gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
     40			default-state = "off";
     41		};
     42
     43		led3g {
     44			label = "tp-link:green:3g";
     45			gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
     46			default-state = "off";
     47		};
     48	};
     49
     50	gpio-keys {
     51		compatible = "gpio-keys";
     52		#address-cells = <1>;
     53		#size-cells = <0>;
     54
     55		button@0 {
     56			label = "wps";
     57			linux,code = <KEY_WPS_BUTTON>;
     58			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
     59		};
     60
     61		button@1 {
     62			label = "sw1";
     63			linux,code = <BTN_0>;
     64			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
     65		};
     66
     67		button@2 {
     68			label = "sw2";
     69			linux,code = <BTN_1>;
     70			gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
     71		};
     72	};
     73
     74	reg_usb_vbus: reg_usb_vbus {
     75		compatible = "regulator-fixed";
     76		regulator-name = "usb_vbus";
     77		regulator-min-microvolt = <5000000>;
     78		regulator-max-microvolt = <5000000>;
     79		gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
     80		enable-active-high;
     81	};
     82};
     83
     84&ref {
     85	clock-frequency = <25000000>;
     86};
     87
     88&uart {
     89	status = "okay";
     90};
     91
     92&gpio {
     93	status = "okay";
     94};
     95
     96&usb {
     97	dr_mode = "host";
     98	vbus-supply = <&reg_usb_vbus>;
     99	status = "okay";
    100};
    101
    102&usb_phy {
    103	status = "okay";
    104};
    105
    106&spi {
    107	num-chipselects = <1>;
    108	status = "okay";
    109
    110	/* Spansion S25FL032PIF SPI flash */
    111	spiflash: s25sl032p@0 {
    112		#address-cells = <1>;
    113		#size-cells = <1>;
    114		compatible = "spansion,s25sl032p", "jedec,spi-nor";
    115		spi-max-frequency = <104000000>;
    116		reg = <0>;
    117	};
    118};