cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mt7620a.dtsi (1107B)

      1// SPDX-License-Identifier: GPL-2.0
      2/ {
      3	#address-cells = <1>;
      4	#size-cells = <1>;
      5	compatible = "ralink,mtk7620a-soc";
      6
      7	cpus {
      8		cpu@0 {
      9			compatible = "mips,mips24KEc";
     10		};
     11	};
     12
     13	cpuintc: cpuintc {
     14		#address-cells = <0>;
     15		#interrupt-cells = <1>;
     16		interrupt-controller;
     17		compatible = "mti,cpu-interrupt-controller";
     18	};
     19
     20	palmbus@10000000 {
     21		compatible = "palmbus";
     22		reg = <0x10000000 0x200000>;
     23                ranges = <0x0 0x10000000 0x1FFFFF>;
     24
     25		#address-cells = <1>;
     26		#size-cells = <1>;
     27
     28		sysc@0 {
     29			compatible = "ralink,mt7620a-sysc";
     30			reg = <0x0 0x100>;
     31		};
     32
     33		intc: intc@200 {
     34			compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
     35			reg = <0x200 0x100>;
     36
     37			interrupt-controller;
     38			#interrupt-cells = <1>;
     39
     40			interrupt-parent = <&cpuintc>;
     41			interrupts = <2>;
     42		};
     43
     44		memc@300 {
     45			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
     46			reg = <0x300 0x100>;
     47		};
     48
     49		uartlite@c00 {
     50			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
     51			reg = <0xc00 0x100>;
     52
     53			interrupt-parent = <&intc>;
     54			interrupts = <12>;
     55
     56			reg-shift = <2>;
     57		};
     58	};
     59};