cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rtl83xx.dtsi (1006B)


      1// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
      2
      3/ {
      4	#address-cells = <1>;
      5	#size-cells = <1>;
      6
      7	aliases {
      8		serial0 = &uart0;
      9		serial1 = &uart1;
     10	};
     11
     12	cpuintc: cpuintc {
     13		compatible = "mti,cpu-interrupt-controller";
     14		#address-cells = <0>;
     15		#interrupt-cells = <1>;
     16		interrupt-controller;
     17	};
     18
     19	soc: soc {
     20		compatible = "simple-bus";
     21		#address-cells = <1>;
     22		#size-cells = <1>;
     23		ranges = <0x0 0x18000000 0x10000>;
     24
     25		uart0: uart@2000 {
     26			compatible = "ns16550a";
     27			reg = <0x2000 0x100>;
     28
     29			clock-frequency = <200000000>;
     30
     31			interrupt-parent = <&cpuintc>;
     32			interrupts = <31>;
     33
     34			reg-io-width = <1>;
     35			reg-shift = <2>;
     36			fifo-size = <1>;
     37			no-loopback-test;
     38
     39			status = "disabled";
     40		};
     41
     42		uart1: uart@2100 {
     43			compatible = "ns16550a";
     44			reg = <0x2100 0x100>;
     45
     46			clock-frequency = <200000000>;
     47
     48			interrupt-parent = <&cpuintc>;
     49			interrupts = <30>;
     50
     51			reg-io-width = <1>;
     52			reg-shift = <2>;
     53			fifo-size = <1>;
     54			no-loopback-test;
     55
     56			status = "disabled";
     57		};
     58	};
     59};