cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

setup.c (2807B)

      1/*
      2 * Setup pointers to hardware dependent routines.
      3 *
      4 * This file is subject to the terms and conditions of the GNU General Public
      5 * License.  See the file "COPYING" in the main directory of this archive
      6 * for more details.
      7 *
      8 * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
      9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
     10 *
     11 */
     12#include <linux/init.h>
     13#include <linux/interrupt.h>
     14#include <linux/io.h>
     15#include <linux/ioport.h>
     16#include <linux/memblock.h>
     17#include <linux/pm.h>
     18
     19#include <asm/bootinfo.h>
     20#include <asm/reboot.h>
     21#include <asm/setup.h>
     22#include <asm/gt64120.h>
     23
     24#include <cobalt.h>
     25
     26extern void cobalt_machine_restart(char *command);
     27extern void cobalt_machine_halt(void);
     28
     29const char *get_system_type(void)
     30{
     31	switch (cobalt_board_id) {
     32		case COBALT_BRD_ID_QUBE1:
     33			return "Cobalt Qube";
     34		case COBALT_BRD_ID_RAQ1:
     35			return "Cobalt RaQ";
     36		case COBALT_BRD_ID_QUBE2:
     37			return "Cobalt Qube2";
     38		case COBALT_BRD_ID_RAQ2:
     39			return "Cobalt RaQ2";
     40	}
     41	return "MIPS Cobalt";
     42}
     43
     44/*
     45 * Cobalt doesn't have PS/2 keyboard/mouse interfaces,
     46 * keyboard controller is never used.
     47 * Also PCI-ISA bridge DMA controller is never used.
     48 */
     49static struct resource cobalt_reserved_resources[] = {
     50	{	/* dma1 */
     51		.start	= 0x00,
     52		.end	= 0x1f,
     53		.name	= "reserved",
     54		.flags	= IORESOURCE_BUSY | IORESOURCE_IO,
     55	},
     56	{	/* keyboard */
     57		.start	= 0x60,
     58		.end	= 0x6f,
     59		.name	= "reserved",
     60		.flags	= IORESOURCE_BUSY | IORESOURCE_IO,
     61	},
     62	{	/* dma page reg */
     63		.start	= 0x80,
     64		.end	= 0x8f,
     65		.name	= "reserved",
     66		.flags	= IORESOURCE_BUSY | IORESOURCE_IO,
     67	},
     68	{	/* dma2 */
     69		.start	= 0xc0,
     70		.end	= 0xdf,
     71		.name	= "reserved",
     72		.flags	= IORESOURCE_BUSY | IORESOURCE_IO,
     73	},
     74};
     75
     76void __init plat_mem_setup(void)
     77{
     78	int i;
     79
     80	_machine_restart = cobalt_machine_restart;
     81	_machine_halt = cobalt_machine_halt;
     82	pm_power_off = cobalt_machine_halt;
     83
     84	set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
     85
     86	/* I/O port resource */
     87	ioport_resource.end = 0x01ffffff;
     88
     89	/* These resources have been reserved by VIA SuperI/O chip. */
     90	for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++)
     91		request_resource(&ioport_resource, cobalt_reserved_resources + i);
     92}
     93
     94/*
     95 * Prom init. We read our one and only communication with the firmware.
     96 * Grab the amount of installed memory.
     97 * Better boot loaders (CoLo) pass a command line too :-)
     98 */
     99
    100void __init prom_init(void)
    101{
    102	unsigned long memsz;
    103	int argc, i;
    104	char **argv;
    105
    106	memsz = fw_arg0 & 0x7fff0000;
    107	argc = fw_arg0 & 0x0000ffff;
    108	argv = (char **)fw_arg1;
    109
    110	for (i = 1; i < argc; i++) {
    111		strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE);
    112		if (i < (argc - 1))
    113			strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
    114	}
    115
    116	memblock_add(0, memsz);
    117
    118	setup_8250_early_printk_port(CKSEG1ADDR(0x1c800000), 0, 0);
    119}