cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

board-ocelot.config (898B)

      1# require CONFIG_CPU_MIPS32_R2=y
      2
      3CONFIG_LEGACY_BOARD_OCELOT=y
      4CONFIG_FIT_IMAGE_FDT_OCELOT=y
      5
      6CONFIG_BRIDGE=y
      7CONFIG_GENERIC_PHY=y
      8
      9CONFIG_MTD=y
     10CONFIG_MTD_CMDLINE_PARTS=y
     11CONFIG_MTD_BLOCK=y
     12CONFIG_MTD_RAW_NAND=y
     13CONFIG_MTD_NAND_PLATFORM=y
     14CONFIG_MTD_SPI_NOR=y
     15CONFIG_MTD_UBI=y
     16
     17CONFIG_BLK_DEV_LOOP=y
     18CONFIG_BLK_DEV_RAM=y
     19
     20CONFIG_SERIAL_8250=y
     21CONFIG_SERIAL_8250_CONSOLE=y
     22CONFIG_SERIAL_OF_PLATFORM=y
     23
     24CONFIG_NETDEVICES=y
     25CONFIG_NET_SWITCHDEV=y
     26CONFIG_NET_DSA=y
     27CONFIG_MSCC_OCELOT_SWITCH=y
     28CONFIG_MSCC_OCELOT_SWITCH_OCELOT=y
     29CONFIG_MDIO_MSCC_MIIM=y
     30CONFIG_MICROSEMI_PHY=y
     31
     32CONFIG_I2C=y
     33CONFIG_I2C_CHARDEV=y
     34CONFIG_I2C_MUX=y
     35CONFIG_I2C_DESIGNWARE_PLATFORM=y
     36
     37CONFIG_SPI=y
     38CONFIG_SPI_BITBANG=y
     39CONFIG_SPI_DESIGNWARE=y
     40CONFIG_SPI_DW_MMIO=y
     41CONFIG_SPI_SPIDEV=y
     42
     43CONFIG_PINCTRL=y
     44CONFIG_PINCTRL_OCELOT=y
     45
     46CONFIG_GPIO_SYSFS=y
     47
     48CONFIG_POWER_RESET=y
     49CONFIG_POWER_RESET_OCELOT_RESET=y
     50
     51CONFIG_MAGIC_SYSRQ=y