cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

lantiq.h (1649B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 *
      4 *  Copyright (C) 2010 John Crispin <john@phrozen.org>
      5 */
      6#ifndef _LANTIQ_H__
      7#define _LANTIQ_H__
      8
      9#include <linux/irq.h>
     10#include <linux/device.h>
     11#include <linux/clk.h>
     12
     13/* generic reg access functions */
     14#define ltq_r32(reg)		__raw_readl(reg)
     15#define ltq_w32(val, reg)	__raw_writel(val, reg)
     16#define ltq_w32_mask(clear, set, reg)	\
     17	ltq_w32((ltq_r32(reg) & ~(clear)) | (set), reg)
     18#define ltq_r8(reg)		__raw_readb(reg)
     19#define ltq_w8(val, reg)	__raw_writeb(val, reg)
     20
     21/* register access macros for EBU and CGU */
     22#define ltq_ebu_w32(x, y)	ltq_w32((x), ltq_ebu_membase + (y))
     23#define ltq_ebu_r32(x)		ltq_r32(ltq_ebu_membase + (x))
     24#define ltq_ebu_w32_mask(x, y, z) \
     25	ltq_w32_mask(x, y, ltq_ebu_membase + (z))
     26extern __iomem void *ltq_ebu_membase;
     27
     28/* spinlock all ebu i/o */
     29extern spinlock_t ebu_lock;
     30
     31/* some irq helpers */
     32extern void ltq_disable_irq(struct irq_data *data);
     33extern void ltq_mask_and_ack_irq(struct irq_data *data);
     34extern void ltq_enable_irq(struct irq_data *data);
     35extern int ltq_eiu_get_irq(int exin);
     36
     37/* clock handling */
     38extern int clk_activate(struct clk *clk);
     39extern void clk_deactivate(struct clk *clk);
     40extern struct clk *clk_get_cpu(void);
     41extern struct clk *clk_get_fpi(void);
     42extern struct clk *clk_get_io(void);
     43extern struct clk *clk_get_ppe(void);
     44
     45/* find out what bootsource we have */
     46extern unsigned char ltq_boot_select(void);
     47/* find out the soc type */
     48extern int ltq_soc_type(void);
     49
     50#define IOPORT_RESOURCE_START	0x10000000
     51#define IOPORT_RESOURCE_END	0xffffffff
     52#define IOMEM_RESOURCE_START	0x10000000
     53#define IOMEM_RESOURCE_END	0xffffffff
     54
     55#endif