cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cvmx-helper-board.h (4665B)

      1/***********************license start***************
      2 * Author: Cavium Networks
      3 *
      4 * Contact: support@caviumnetworks.com
      5 * This file is part of the OCTEON SDK
      6 *
      7 * Copyright (c) 2003-2008 Cavium Networks
      8 *
      9 * This file is free software; you can redistribute it and/or modify
     10 * it under the terms of the GNU General Public License, Version 2, as
     11 * published by the Free Software Foundation.
     12 *
     13 * This file is distributed in the hope that it will be useful, but
     14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
     15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
     16 * NONINFRINGEMENT.  See the GNU General Public License for more
     17 * details.
     18 *
     19 * You should have received a copy of the GNU General Public License
     20 * along with this file; if not, write to the Free Software
     21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
     22 * or visit http://www.gnu.org/licenses/.
     23 *
     24 * This file may also be available under a different license from Cavium.
     25 * Contact Cavium Networks for more information
     26 ***********************license end**************************************/
     27
     28/**
     29 *
     30 * Helper functions to abstract board specific data about
     31 * network ports from the rest of the cvmx-helper files.
     32 *
     33 */
     34#ifndef __CVMX_HELPER_BOARD_H__
     35#define __CVMX_HELPER_BOARD_H__
     36
     37#include <asm/octeon/cvmx-helper.h>
     38
     39enum cvmx_helper_board_usb_clock_types {
     40	USB_CLOCK_TYPE_REF_12,
     41	USB_CLOCK_TYPE_REF_24,
     42	USB_CLOCK_TYPE_REF_48,
     43	USB_CLOCK_TYPE_CRYSTAL_12,
     44};
     45
     46typedef enum {
     47	set_phy_link_flags_autoneg = 0x1,
     48	set_phy_link_flags_flow_control_dont_touch = 0x0 << 1,
     49	set_phy_link_flags_flow_control_enable = 0x1 << 1,
     50	set_phy_link_flags_flow_control_disable = 0x2 << 1,
     51	set_phy_link_flags_flow_control_mask = 0x3 << 1,	/* Mask for 2 bit wide flow control field */
     52} cvmx_helper_board_set_phy_link_flags_types_t;
     53
     54/*
     55 * Fake IPD port, the RGMII/MII interface may use different PHY, use
     56 * this macro to return appropriate MIX address to read the PHY.
     57 */
     58#define CVMX_HELPER_BOARD_MGMT_IPD_PORT	    -10
     59
     60/**
     61 * Return the MII PHY address associated with the given IPD
     62 * port. A result of -1 means there isn't a MII capable PHY
     63 * connected to this port. On chips supporting multiple MII
     64 * busses the bus number is encoded in bits <15:8>.
     65 *
     66 * This function must be modifed for every new Octeon board.
     67 * Internally it uses switch statements based on the cvmx_sysinfo
     68 * data to determine board types and revisions. It relys on the
     69 * fact that every Octeon board receives a unique board type
     70 * enumeration from the bootloader.
     71 *
     72 * @ipd_port: Octeon IPD port to get the MII address for.
     73 *
     74 * Returns MII PHY address and bus number or -1.
     75 */
     76extern int cvmx_helper_board_get_mii_address(int ipd_port);
     77
     78/**
     79 * This function is the board specific method of determining an
     80 * ethernet ports link speed. Most Octeon boards have Marvell PHYs
     81 * and are handled by the fall through case. This function must be
     82 * updated for boards that don't have the normal Marvell PHYs.
     83 *
     84 * This function must be modifed for every new Octeon board.
     85 * Internally it uses switch statements based on the cvmx_sysinfo
     86 * data to determine board types and revisions. It relys on the
     87 * fact that every Octeon board receives a unique board type
     88 * enumeration from the bootloader.
     89 *
     90 * @ipd_port: IPD input port associated with the port we want to get link
     91 *		   status for.
     92 *
     93 * Returns The ports link status. If the link isn't fully resolved, this must
     94 *	   return zero.
     95 */
     96extern union cvmx_helper_link_info __cvmx_helper_board_link_get(int ipd_port);
     97
     98/**
     99 * This function is called by cvmx_helper_interface_probe() after it
    100 * determines the number of ports Octeon can support on a specific
    101 * interface. This function is the per board location to override
    102 * this value. It is called with the number of ports Octeon might
    103 * support and should return the number of actual ports on the
    104 * board.
    105 *
    106 * This function must be modifed for every new Octeon board.
    107 * Internally it uses switch statements based on the cvmx_sysinfo
    108 * data to determine board types and revisions. It relys on the
    109 * fact that every Octeon board receives a unique board type
    110 * enumeration from the bootloader.
    111 *
    112 * @interface: Interface to probe
    113 * @supported_ports:
    114 *		    Number of ports Octeon supports.
    115 *
    116 * Returns Number of ports the actual board supports. Many times this will
    117 *	   simple be "support_ports".
    118 */
    119extern int __cvmx_helper_board_interface_probe(int interface,
    120					       int supported_ports);
    121
    122enum cvmx_helper_board_usb_clock_types __cvmx_helper_board_usb_get_clock_type(void);
    123
    124#endif /* __CVMX_HELPER_BOARD_H__ */