cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sb1250_syncser.h (4482B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*  *********************************************************************
      3    *  SB1250 Board Support Package
      4    *
      5    *  Synchronous Serial Constants		 File: sb1250_syncser.h
      6    *
      7    *  This module contains constants and macros useful for
      8    *  manipulating the SB1250's Synchronous Serial
      9    *
     10    *  SB1250 specification level:  User's manual 1/02/02
     11    *
     12    *********************************************************************
     13    *
     14    *  Copyright 2000,2001,2002,2003
     15    *  Broadcom Corporation. All rights reserved.
     16    *
     17    ********************************************************************* */
     18
     19
     20#ifndef _SB1250_SYNCSER_H
     21#define _SB1250_SYNCSER_H
     22
     23#include <asm/sibyte/sb1250_defs.h>
     24
     25/*
     26 * Serial Mode Configuration Register
     27 */
     28
     29#define M_SYNCSER_CRC_MODE		   _SB_MAKEMASK1(0)
     30#define M_SYNCSER_MSB_FIRST		   _SB_MAKEMASK1(1)
     31
     32#define S_SYNCSER_FLAG_NUM		   2
     33#define M_SYNCSER_FLAG_NUM		   _SB_MAKEMASK(4, S_SYNCSER_FLAG_NUM)
     34#define V_SYNCSER_FLAG_NUM		   _SB_MAKEVALUE(x, S_SYNCSER_FLAG_NUM)
     35
     36#define M_SYNCSER_FLAG_EN		   _SB_MAKEMASK1(6)
     37#define M_SYNCSER_HDLC_EN		   _SB_MAKEMASK1(7)
     38#define M_SYNCSER_LOOP_MODE		   _SB_MAKEMASK1(8)
     39#define M_SYNCSER_LOOPBACK		   _SB_MAKEMASK1(9)
     40
     41/*
     42 * Serial Clock Source and Line Interface Mode Register
     43 */
     44
     45#define M_SYNCSER_RXCLK_INV		   _SB_MAKEMASK1(0)
     46#define M_SYNCSER_RXCLK_EXT		   _SB_MAKEMASK1(1)
     47
     48#define S_SYNCSER_RXSYNC_DLY		   2
     49#define M_SYNCSER_RXSYNC_DLY		   _SB_MAKEMASK(2, S_SYNCSER_RXSYNC_DLY)
     50#define V_SYNCSER_RXSYNC_DLY(x)		   _SB_MAKEVALUE(x, S_SYNCSER_RXSYNC_DLY)
     51
     52#define M_SYNCSER_RXSYNC_LOW		   _SB_MAKEMASK1(4)
     53#define M_SYNCSER_RXSTRB_LOW		   _SB_MAKEMASK1(5)
     54
     55#define M_SYNCSER_RXSYNC_EDGE		   _SB_MAKEMASK1(6)
     56#define M_SYNCSER_RXSYNC_INT		   _SB_MAKEMASK1(7)
     57
     58#define M_SYNCSER_TXCLK_INV		   _SB_MAKEMASK1(8)
     59#define M_SYNCSER_TXCLK_EXT		   _SB_MAKEMASK1(9)
     60
     61#define S_SYNCSER_TXSYNC_DLY		   10
     62#define M_SYNCSER_TXSYNC_DLY		   _SB_MAKEMASK(2, S_SYNCSER_TXSYNC_DLY)
     63#define V_SYNCSER_TXSYNC_DLY(x)		   _SB_MAKEVALUE(x, S_SYNCSER_TXSYNC_DLY)
     64
     65#define M_SYNCSER_TXSYNC_LOW		   _SB_MAKEMASK1(12)
     66#define M_SYNCSER_TXSTRB_LOW		   _SB_MAKEMASK1(13)
     67
     68#define M_SYNCSER_TXSYNC_EDGE		   _SB_MAKEMASK1(14)
     69#define M_SYNCSER_TXSYNC_INT		   _SB_MAKEMASK1(15)
     70
     71/*
     72 * Serial Command Register
     73 */
     74
     75#define M_SYNCSER_CMD_RX_EN		   _SB_MAKEMASK1(0)
     76#define M_SYNCSER_CMD_TX_EN		   _SB_MAKEMASK1(1)
     77#define M_SYNCSER_CMD_RX_RESET		   _SB_MAKEMASK1(2)
     78#define M_SYNCSER_CMD_TX_RESET		   _SB_MAKEMASK1(3)
     79#define M_SYNCSER_CMD_TX_PAUSE		   _SB_MAKEMASK1(5)
     80
     81/*
     82 * Serial DMA Enable Register
     83 */
     84
     85#define M_SYNCSER_DMA_RX_EN		   _SB_MAKEMASK1(0)
     86#define M_SYNCSER_DMA_TX_EN		   _SB_MAKEMASK1(4)
     87
     88/*
     89 * Serial Status Register
     90 */
     91
     92#define M_SYNCSER_RX_CRCERR		   _SB_MAKEMASK1(0)
     93#define M_SYNCSER_RX_ABORT		   _SB_MAKEMASK1(1)
     94#define M_SYNCSER_RX_OCTET		   _SB_MAKEMASK1(2)
     95#define M_SYNCSER_RX_LONGFRM		   _SB_MAKEMASK1(3)
     96#define M_SYNCSER_RX_SHORTFRM		   _SB_MAKEMASK1(4)
     97#define M_SYNCSER_RX_OVERRUN		   _SB_MAKEMASK1(5)
     98#define M_SYNCSER_RX_SYNC_ERR		   _SB_MAKEMASK1(6)
     99#define M_SYNCSER_TX_CRCERR		   _SB_MAKEMASK1(8)
    100#define M_SYNCSER_TX_UNDERRUN		   _SB_MAKEMASK1(9)
    101#define M_SYNCSER_TX_SYNC_ERR		   _SB_MAKEMASK1(10)
    102#define M_SYNCSER_TX_PAUSE_COMPLETE	   _SB_MAKEMASK1(11)
    103#define M_SYNCSER_RX_EOP_COUNT		   _SB_MAKEMASK1(16)
    104#define M_SYNCSER_RX_EOP_TIMER		   _SB_MAKEMASK1(17)
    105#define M_SYNCSER_RX_EOP_SEEN		   _SB_MAKEMASK1(18)
    106#define M_SYNCSER_RX_HWM		   _SB_MAKEMASK1(19)
    107#define M_SYNCSER_RX_LWM		   _SB_MAKEMASK1(20)
    108#define M_SYNCSER_RX_DSCR		   _SB_MAKEMASK1(21)
    109#define M_SYNCSER_RX_DERR		   _SB_MAKEMASK1(22)
    110#define M_SYNCSER_TX_EOP_COUNT		   _SB_MAKEMASK1(24)
    111#define M_SYNCSER_TX_EOP_TIMER		   _SB_MAKEMASK1(25)
    112#define M_SYNCSER_TX_EOP_SEEN		   _SB_MAKEMASK1(26)
    113#define M_SYNCSER_TX_HWM		   _SB_MAKEMASK1(27)
    114#define M_SYNCSER_TX_LWM		   _SB_MAKEMASK1(28)
    115#define M_SYNCSER_TX_DSCR		   _SB_MAKEMASK1(29)
    116#define M_SYNCSER_TX_DERR		   _SB_MAKEMASK1(30)
    117#define M_SYNCSER_TX_DZERO		   _SB_MAKEMASK1(31)
    118
    119/*
    120 * Sequencer Table Entry format
    121 */
    122
    123#define M_SYNCSER_SEQ_LAST		   _SB_MAKEMASK1(0)
    124#define M_SYNCSER_SEQ_BYTE		   _SB_MAKEMASK1(1)
    125
    126#define S_SYNCSER_SEQ_COUNT		   2
    127#define M_SYNCSER_SEQ_COUNT		   _SB_MAKEMASK(4, S_SYNCSER_SEQ_COUNT)
    128#define V_SYNCSER_SEQ_COUNT(x)		   _SB_MAKEVALUE(x, S_SYNCSER_SEQ_COUNT)
    129
    130#define M_SYNCSER_SEQ_ENABLE		   _SB_MAKEMASK1(6)
    131#define M_SYNCSER_SEQ_STROBE		   _SB_MAKEMASK1(7)
    132
    133#endif