cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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processor.h (745B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (C) 2020 ARM Ltd.
      4 */
      5#ifndef __ASM_VDSO_PROCESSOR_H
      6#define __ASM_VDSO_PROCESSOR_H
      7
      8#ifndef __ASSEMBLY__
      9
     10#ifdef CONFIG_CPU_LOONGSON64
     11/*
     12 * Loongson-3's SFB (Store-Fill-Buffer) may buffer writes indefinitely when a
     13 * tight read loop is executed, because reads take priority over writes & the
     14 * hardware (incorrectly) doesn't ensure that writes will eventually occur.
     15 *
     16 * Since spin loops of any kind should have a cpu_relax() in them, force an SFB
     17 * flush from cpu_relax() such that any pending writes will become visible as
     18 * expected.
     19 */
     20#define cpu_relax()	smp_mb()
     21#else
     22#define cpu_relax()	barrier()
     23#endif
     24
     25#endif /* __ASSEMBLY__ */
     26
     27#endif /* __ASM_VDSO_PROCESSOR_H */