cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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xwidget.h (7678B)


      1/*
      2 * This file is subject to the terms and conditions of the GNU General Public
      3 * License.  See the file "COPYING" in the main directory of this archive
      4 * for more details.
      5 *
      6 * xwidget.h - generic crosstalk widget header file, derived from IRIX
      7 * <sys/xtalk/xtalkwidget.h>, revision 1.32.
      8 *
      9 * Copyright (C) 1996, 1999 Silcon Graphics, Inc.
     10 * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
     11 */
     12#ifndef _ASM_XTALK_XWIDGET_H
     13#define _ASM_XTALK_XWIDGET_H
     14
     15#include <linux/types.h>
     16#include <asm/xtalk/xtalk.h>
     17
     18#define WIDGET_ID			0x04
     19#define WIDGET_STATUS			0x0c
     20#define WIDGET_ERR_UPPER_ADDR		0x14
     21#define WIDGET_ERR_LOWER_ADDR		0x1c
     22#define WIDGET_CONTROL			0x24
     23#define WIDGET_REQ_TIMEOUT		0x2c
     24#define WIDGET_INTDEST_UPPER_ADDR	0x34
     25#define WIDGET_INTDEST_LOWER_ADDR	0x3c
     26#define WIDGET_ERR_CMD_WORD		0x44
     27#define WIDGET_LLP_CFG			0x4c
     28#define WIDGET_TFLUSH			0x54
     29
     30/* WIDGET_ID */
     31#define WIDGET_REV_NUM			0xf0000000
     32#define WIDGET_PART_NUM			0x0ffff000
     33#define WIDGET_MFG_NUM			0x00000ffe
     34#define WIDGET_REV_NUM_SHFT		28
     35#define WIDGET_PART_NUM_SHFT		12
     36#define WIDGET_MFG_NUM_SHFT		1
     37
     38#define XWIDGET_PART_NUM(widgetid) (((widgetid) & WIDGET_PART_NUM) >> WIDGET_PART_NUM_SHFT)
     39#define XWIDGET_REV_NUM(widgetid) (((widgetid) & WIDGET_REV_NUM) >> WIDGET_REV_NUM_SHFT)
     40#define XWIDGET_MFG_NUM(widgetid) (((widgetid) & WIDGET_MFG_NUM) >> WIDGET_MFG_NUM_SHFT)
     41
     42/* WIDGET_STATUS */
     43#define WIDGET_LLP_REC_CNT		0xff000000
     44#define WIDGET_LLP_TX_CNT		0x00ff0000
     45#define WIDGET_PENDING			0x0000001f
     46
     47/* WIDGET_ERR_UPPER_ADDR */
     48#define WIDGET_ERR_UPPER_ADDR_ONLY	0x0000ffff
     49
     50/* WIDGET_CONTROL */
     51#define WIDGET_F_BAD_PKT		0x00010000
     52#define WIDGET_LLP_XBAR_CRD		0x0000f000
     53#define WIDGET_LLP_XBAR_CRD_SHFT	12
     54#define WIDGET_CLR_RLLP_CNT		0x00000800
     55#define WIDGET_CLR_TLLP_CNT		0x00000400
     56#define WIDGET_SYS_END			0x00000200
     57#define WIDGET_MAX_TRANS		0x000001f0
     58#define WIDGET_WIDGET_ID		0x0000000f
     59
     60/* WIDGET_INTDEST_UPPER_ADDR */
     61#define WIDGET_INT_VECTOR		0xff000000
     62#define WIDGET_INT_VECTOR_SHFT		24
     63#define WIDGET_TARGET_ID		0x000f0000
     64#define WIDGET_TARGET_ID_SHFT		16
     65#define WIDGET_UPP_ADDR			0x0000ffff
     66
     67/* WIDGET_ERR_CMD_WORD */
     68#define WIDGET_DIDN			0xf0000000
     69#define WIDGET_SIDN			0x0f000000
     70#define WIDGET_PACTYP			0x00f00000
     71#define WIDGET_TNUM			0x000f8000
     72#define WIDGET_COHERENT			0x00004000
     73#define WIDGET_DS			0x00003000
     74#define WIDGET_GBR			0x00000800
     75#define WIDGET_VBPM			0x00000400
     76#define WIDGET_ERROR			0x00000200
     77#define WIDGET_BARRIER			0x00000100
     78
     79/* WIDGET_LLP_CFG */
     80#define WIDGET_LLP_MAXRETRY		0x03ff0000
     81#define WIDGET_LLP_MAXRETRY_SHFT	16
     82#define WIDGET_LLP_NULLTIMEOUT		0x0000fc00
     83#define WIDGET_LLP_NULLTIMEOUT_SHFT	10
     84#define WIDGET_LLP_MAXBURST		0x000003ff
     85#define WIDGET_LLP_MAXBURST_SHFT	0
     86
     87/* Xtalk Widget Device Mfgr Nums */
     88#define WIDGET_XBOW_MFGR_NUM	0x0      /* IP30 XBow Chip */
     89#define WIDGET_XXBOW_MFGR_NUM	0x0      /* IP35 Xbow + XBridge Chip */
     90#define WIDGET_ODYS_MFGR_NUM	0x023    /* Odyssey / VPro GFX */
     91#define WIDGET_TPU_MFGR_NUM	0x024    /* Tensor Processor Unit */
     92#define WIDGET_XBRDG_MFGR_NUM	0x024    /* IP35 XBridge Chip */
     93#define WIDGET_HEART_MFGR_NUM	0x036    /* IP30 HEART Chip */
     94#define WIDGET_BRIDG_MFGR_NUM	0x036    /* PCI Bridge */
     95#define WIDGET_HUB_MFGR_NUM	0x036    /* IP27 Hub Chip */
     96#define WIDGET_BDRCK_MFGR_NUM	0x036    /* IP35 Bedrock Chip */
     97#define WIDGET_IMPCT_MFGR_NUM	0x2aa    /* HQ4 / Impact GFX */
     98#define WIDGET_KONA_MFGR_NUM	0x2aa    /* InfiniteReality3 / Kona GFX */
     99#define WIDGET_NULL_MFGR_NUM	-1       /* NULL */
    100
    101/* Xtalk Widget Device Part Nums */
    102#define WIDGET_XBOW_PART_NUM	0x0000
    103#define WIDGET_HEART_PART_NUM	0xc001
    104#define WIDGET_BRIDG_PART_NUM	0xc002
    105#define WIDGET_IMPCT_PART_NUM	0xc003
    106#define WIDGET_ODYS_PART_NUM	0xc013
    107#define WIDGET_HUB_PART_NUM	0xc101
    108#define WIDGET_KONA_PART_NUM	0xc102
    109#define WIDGET_BDRCK_PART_NUM	0xc110
    110#define WIDGET_TPU_PART_NUM	0xc202
    111#define WIDGET_XXBOW_PART_NUM	0xd000
    112#define WIDGET_XBRDG_PART_NUM	0xd002
    113#define WIDGET_NULL_PART_NUM	-1
    114
    115/* For Xtalk Widget identification */
    116struct widget_ident {
    117	u32 mfgr;
    118	u32 part;
    119	char *name;
    120	char *revs[16];
    121};
    122
    123/* Known Xtalk Widgets */
    124static const struct widget_ident __initconst widget_idents[] = {
    125	{
    126		WIDGET_XBOW_MFGR_NUM,
    127		WIDGET_XBOW_PART_NUM,
    128		"xbow",
    129		{NULL, "1.0", "1.1", "1.2", "1.3", "2.0", NULL},
    130	},
    131	{
    132		WIDGET_HEART_MFGR_NUM,
    133		WIDGET_HEART_PART_NUM,
    134		"heart",
    135		{NULL, "A", "B", "C", "D", "E", "F", NULL},
    136	},
    137	{
    138		WIDGET_BRIDG_MFGR_NUM,
    139		WIDGET_BRIDG_PART_NUM,
    140		"bridge",
    141		{NULL, "A", "B", "C", "D", NULL},
    142	},
    143	{
    144		WIDGET_IMPCT_MFGR_NUM,
    145		WIDGET_IMPCT_PART_NUM,
    146		"impact",
    147		{NULL, "A", "B", NULL},
    148	},
    149	{
    150		WIDGET_ODYS_MFGR_NUM,
    151		WIDGET_ODYS_PART_NUM,
    152		"odyssey",
    153		{NULL, "A", "B", NULL},
    154	},
    155	{
    156		WIDGET_HUB_MFGR_NUM,
    157		WIDGET_HUB_PART_NUM,
    158		"hub",
    159		{NULL, "1.0", "2.0", "2.1", "2.2", "2.3", "2.4", NULL},
    160	},
    161	{
    162		WIDGET_KONA_MFGR_NUM,
    163		WIDGET_KONA_PART_NUM,
    164		"kona",
    165		{NULL},
    166	},
    167	{
    168		WIDGET_BDRCK_MFGR_NUM,
    169		WIDGET_BDRCK_PART_NUM,
    170		"bedrock",
    171		{NULL, "1.0", "1.1", NULL},
    172	},
    173	{
    174		WIDGET_TPU_MFGR_NUM,
    175		WIDGET_TPU_PART_NUM,
    176		"tpu",
    177		{"0", NULL},
    178	},
    179	{
    180		WIDGET_XXBOW_MFGR_NUM,
    181		WIDGET_XXBOW_PART_NUM,
    182		"xxbow",
    183		{NULL, "1.0", "2.0", NULL},
    184	},
    185	{
    186		WIDGET_XBRDG_MFGR_NUM,
    187		WIDGET_XBRDG_PART_NUM,
    188		"xbridge",
    189		{NULL, "A", "B", NULL},
    190	},
    191	{
    192		WIDGET_NULL_MFGR_NUM,
    193		WIDGET_NULL_PART_NUM,
    194		NULL,
    195		{NULL},
    196	}
    197};
    198
    199/*
    200 * according to the crosstalk spec, only 32-bits access to the widget
    201 * configuration registers is allowed.	some widgets may allow 64-bits
    202 * access but software should not depend on it.	 registers beyond the
    203 * widget target flush register are widget dependent thus will not be
    204 * defined here
    205 */
    206#ifndef __ASSEMBLY__
    207typedef u32 widgetreg_t;
    208
    209/* widget configuration registers */
    210typedef volatile struct widget_cfg {
    211	widgetreg_t		w_pad_0;		/* 0x00 */
    212	widgetreg_t		w_id;			/* 0x04 */
    213	widgetreg_t		w_pad_1;		/* 0x08 */
    214	widgetreg_t		w_status;		/* 0x0c */
    215	widgetreg_t		w_pad_2;		/* 0x10 */
    216	widgetreg_t		w_err_upper_addr;	/* 0x14 */
    217	widgetreg_t		w_pad_3;		/* 0x18 */
    218	widgetreg_t		w_err_lower_addr;	/* 0x1c */
    219	widgetreg_t		w_pad_4;		/* 0x20 */
    220	widgetreg_t		w_control;		/* 0x24 */
    221	widgetreg_t		w_pad_5;		/* 0x28 */
    222	widgetreg_t		w_req_timeout;		/* 0x2c */
    223	widgetreg_t		w_pad_6;		/* 0x30 */
    224	widgetreg_t		w_intdest_upper_addr;	/* 0x34 */
    225	widgetreg_t		w_pad_7;		/* 0x38 */
    226	widgetreg_t		w_intdest_lower_addr;	/* 0x3c */
    227	widgetreg_t		w_pad_8;		/* 0x40 */
    228	widgetreg_t		w_err_cmd_word;		/* 0x44 */
    229	widgetreg_t		w_pad_9;		/* 0x48 */
    230	widgetreg_t		w_llp_cfg;		/* 0x4c */
    231	widgetreg_t		w_pad_10;		/* 0x50 */
    232	widgetreg_t		w_tflush;		/* 0x54 */
    233} widget_cfg_t;
    234
    235typedef struct {
    236	unsigned	didn:4;
    237	unsigned	sidn:4;
    238	unsigned	pactyp:4;
    239	unsigned	tnum:5;
    240	unsigned	ct:1;
    241	unsigned	ds:2;
    242	unsigned	gbr:1;
    243	unsigned	vbpm:1;
    244	unsigned	error:1;
    245	unsigned	bo:1;
    246	unsigned	other:8;
    247} w_err_cmd_word_f;
    248
    249typedef union {
    250	widgetreg_t		r;
    251	w_err_cmd_word_f	f;
    252} w_err_cmd_word_u;
    253
    254typedef struct xwidget_info_s *xwidget_info_t;
    255
    256/*
    257 * Crosstalk Widget Hardware Identification, as defined in the Crosstalk spec.
    258 */
    259typedef struct xwidget_hwid_s {
    260	xwidget_part_num_t	part_num;
    261	xwidget_rev_num_t	rev_num;
    262	xwidget_mfg_num_t	mfg_num;
    263} *xwidget_hwid_t;
    264
    265
    266/*
    267 * Returns 1 if a driver that handles devices described by hwid1 is able
    268 * to manage a device with hardwareid hwid2.  NOTE: We don't check rev
    269 * numbers at all.
    270 */
    271#define XWIDGET_HARDWARE_ID_MATCH(hwid1, hwid2) \
    272	(((hwid1)->part_num == (hwid2)->part_num) && \
    273	(((hwid1)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
    274	((hwid2)->mfg_num == XWIDGET_MFG_NUM_NONE) || \
    275	((hwid1)->mfg_num == (hwid2)->mfg_num)))
    276
    277#endif /* !__ASSEMBLY__ */
    278
    279#endif /* _ASM_XTALK_XWIDGET_H */