cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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reg.h (5426B)


      1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
      2/*
      3 * Various register offset definitions for debuggers, core file
      4 * examiners and whatnot.
      5 *
      6 * This file is subject to the terms and conditions of the GNU General Public
      7 * License.  See the file "COPYING" in the main directory of this archive
      8 * for more details.
      9 *
     10 * Copyright (C) 1995, 1999 Ralf Baechle
     11 * Copyright (C) 1995, 1999 Silicon Graphics
     12 */
     13#ifndef __UAPI_ASM_MIPS_REG_H
     14#define __UAPI_ASM_MIPS_REG_H
     15
     16#define MIPS32_EF_R0		6
     17#define MIPS32_EF_R1		7
     18#define MIPS32_EF_R2		8
     19#define MIPS32_EF_R3		9
     20#define MIPS32_EF_R4		10
     21#define MIPS32_EF_R5		11
     22#define MIPS32_EF_R6		12
     23#define MIPS32_EF_R7		13
     24#define MIPS32_EF_R8		14
     25#define MIPS32_EF_R9		15
     26#define MIPS32_EF_R10		16
     27#define MIPS32_EF_R11		17
     28#define MIPS32_EF_R12		18
     29#define MIPS32_EF_R13		19
     30#define MIPS32_EF_R14		20
     31#define MIPS32_EF_R15		21
     32#define MIPS32_EF_R16		22
     33#define MIPS32_EF_R17		23
     34#define MIPS32_EF_R18		24
     35#define MIPS32_EF_R19		25
     36#define MIPS32_EF_R20		26
     37#define MIPS32_EF_R21		27
     38#define MIPS32_EF_R22		28
     39#define MIPS32_EF_R23		29
     40#define MIPS32_EF_R24		30
     41#define MIPS32_EF_R25		31
     42
     43/*
     44 * k0/k1 unsaved
     45 */
     46#define MIPS32_EF_R26		32
     47#define MIPS32_EF_R27		33
     48
     49#define MIPS32_EF_R28		34
     50#define MIPS32_EF_R29		35
     51#define MIPS32_EF_R30		36
     52#define MIPS32_EF_R31		37
     53
     54/*
     55 * Saved special registers
     56 */
     57#define MIPS32_EF_LO		38
     58#define MIPS32_EF_HI		39
     59
     60#define MIPS32_EF_CP0_EPC	40
     61#define MIPS32_EF_CP0_BADVADDR	41
     62#define MIPS32_EF_CP0_STATUS	42
     63#define MIPS32_EF_CP0_CAUSE	43
     64#define MIPS32_EF_UNUSED0	44
     65
     66#define MIPS32_EF_SIZE		180
     67
     68#define MIPS64_EF_R0		0
     69#define MIPS64_EF_R1		1
     70#define MIPS64_EF_R2		2
     71#define MIPS64_EF_R3		3
     72#define MIPS64_EF_R4		4
     73#define MIPS64_EF_R5		5
     74#define MIPS64_EF_R6		6
     75#define MIPS64_EF_R7		7
     76#define MIPS64_EF_R8		8
     77#define MIPS64_EF_R9		9
     78#define MIPS64_EF_R10		10
     79#define MIPS64_EF_R11		11
     80#define MIPS64_EF_R12		12
     81#define MIPS64_EF_R13		13
     82#define MIPS64_EF_R14		14
     83#define MIPS64_EF_R15		15
     84#define MIPS64_EF_R16		16
     85#define MIPS64_EF_R17		17
     86#define MIPS64_EF_R18		18
     87#define MIPS64_EF_R19		19
     88#define MIPS64_EF_R20		20
     89#define MIPS64_EF_R21		21
     90#define MIPS64_EF_R22		22
     91#define MIPS64_EF_R23		23
     92#define MIPS64_EF_R24		24
     93#define MIPS64_EF_R25		25
     94
     95/*
     96 * k0/k1 unsaved
     97 */
     98#define MIPS64_EF_R26		26
     99#define MIPS64_EF_R27		27
    100
    101
    102#define MIPS64_EF_R28		28
    103#define MIPS64_EF_R29		29
    104#define MIPS64_EF_R30		30
    105#define MIPS64_EF_R31		31
    106
    107/*
    108 * Saved special registers
    109 */
    110#define MIPS64_EF_LO		32
    111#define MIPS64_EF_HI		33
    112
    113#define MIPS64_EF_CP0_EPC	34
    114#define MIPS64_EF_CP0_BADVADDR	35
    115#define MIPS64_EF_CP0_STATUS	36
    116#define MIPS64_EF_CP0_CAUSE	37
    117
    118#define MIPS64_EF_SIZE		304	/* size in bytes */
    119
    120#if _MIPS_SIM == _MIPS_SIM_ABI32
    121
    122#define EF_R0			MIPS32_EF_R0
    123#define EF_R1			MIPS32_EF_R1
    124#define EF_R2			MIPS32_EF_R2
    125#define EF_R3			MIPS32_EF_R3
    126#define EF_R4			MIPS32_EF_R4
    127#define EF_R5			MIPS32_EF_R5
    128#define EF_R6			MIPS32_EF_R6
    129#define EF_R7			MIPS32_EF_R7
    130#define EF_R8			MIPS32_EF_R8
    131#define EF_R9			MIPS32_EF_R9
    132#define EF_R10			MIPS32_EF_R10
    133#define EF_R11			MIPS32_EF_R11
    134#define EF_R12			MIPS32_EF_R12
    135#define EF_R13			MIPS32_EF_R13
    136#define EF_R14			MIPS32_EF_R14
    137#define EF_R15			MIPS32_EF_R15
    138#define EF_R16			MIPS32_EF_R16
    139#define EF_R17			MIPS32_EF_R17
    140#define EF_R18			MIPS32_EF_R18
    141#define EF_R19			MIPS32_EF_R19
    142#define EF_R20			MIPS32_EF_R20
    143#define EF_R21			MIPS32_EF_R21
    144#define EF_R22			MIPS32_EF_R22
    145#define EF_R23			MIPS32_EF_R23
    146#define EF_R24			MIPS32_EF_R24
    147#define EF_R25			MIPS32_EF_R25
    148#define EF_R26			MIPS32_EF_R26
    149#define EF_R27			MIPS32_EF_R27
    150#define EF_R28			MIPS32_EF_R28
    151#define EF_R29			MIPS32_EF_R29
    152#define EF_R30			MIPS32_EF_R30
    153#define EF_R31			MIPS32_EF_R31
    154#define EF_LO			MIPS32_EF_LO
    155#define EF_HI			MIPS32_EF_HI
    156#define EF_CP0_EPC		MIPS32_EF_CP0_EPC
    157#define EF_CP0_BADVADDR		MIPS32_EF_CP0_BADVADDR
    158#define EF_CP0_STATUS		MIPS32_EF_CP0_STATUS
    159#define EF_CP0_CAUSE		MIPS32_EF_CP0_CAUSE
    160#define EF_UNUSED0		MIPS32_EF_UNUSED0
    161#define EF_SIZE			MIPS32_EF_SIZE
    162
    163#elif _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
    164
    165#define EF_R0			MIPS64_EF_R0
    166#define EF_R1			MIPS64_EF_R1
    167#define EF_R2			MIPS64_EF_R2
    168#define EF_R3			MIPS64_EF_R3
    169#define EF_R4			MIPS64_EF_R4
    170#define EF_R5			MIPS64_EF_R5
    171#define EF_R6			MIPS64_EF_R6
    172#define EF_R7			MIPS64_EF_R7
    173#define EF_R8			MIPS64_EF_R8
    174#define EF_R9			MIPS64_EF_R9
    175#define EF_R10			MIPS64_EF_R10
    176#define EF_R11			MIPS64_EF_R11
    177#define EF_R12			MIPS64_EF_R12
    178#define EF_R13			MIPS64_EF_R13
    179#define EF_R14			MIPS64_EF_R14
    180#define EF_R15			MIPS64_EF_R15
    181#define EF_R16			MIPS64_EF_R16
    182#define EF_R17			MIPS64_EF_R17
    183#define EF_R18			MIPS64_EF_R18
    184#define EF_R19			MIPS64_EF_R19
    185#define EF_R20			MIPS64_EF_R20
    186#define EF_R21			MIPS64_EF_R21
    187#define EF_R22			MIPS64_EF_R22
    188#define EF_R23			MIPS64_EF_R23
    189#define EF_R24			MIPS64_EF_R24
    190#define EF_R25			MIPS64_EF_R25
    191#define EF_R26			MIPS64_EF_R26
    192#define EF_R27			MIPS64_EF_R27
    193#define EF_R28			MIPS64_EF_R28
    194#define EF_R29			MIPS64_EF_R29
    195#define EF_R30			MIPS64_EF_R30
    196#define EF_R31			MIPS64_EF_R31
    197#define EF_LO			MIPS64_EF_LO
    198#define EF_HI			MIPS64_EF_HI
    199#define EF_CP0_EPC		MIPS64_EF_CP0_EPC
    200#define EF_CP0_BADVADDR		MIPS64_EF_CP0_BADVADDR
    201#define EF_CP0_STATUS		MIPS64_EF_CP0_STATUS
    202#define EF_CP0_CAUSE		MIPS64_EF_CP0_CAUSE
    203#define EF_SIZE			MIPS64_EF_SIZE
    204
    205#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
    206
    207#endif /* __UAPI_ASM_MIPS_REG_H */